AT89LP428 Atmel Corporation, AT89LP428 Datasheet - Page 13

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AT89LP428

Manufacturer Part Number
AT89LP428
Description
Manufacturer
Atmel Corporation
Datasheet

Specifications of AT89LP428

Flash (kbytes)
4 Kbytes
Max. Operating Frequency
25 MHz
Cpu
8051-1C
Max I/o Pins
30
Spi
1
Uart
1
Sram (kbytes)
0.75
Eeprom (bytes)
512
Self Program Memory
IAP
Operating Voltage (vcc)
2.4 to 5.5
Timers
3
Isp
SPI/OCD
Watchdog
Yes

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3654A–MICRO–8/09
Figure 3-4.
Figure 3-5.
The auto-erase bit AERS (MEMCON.6) can be set to one to perform a page erase automatically
at the beginning of any write sequence. The page erase will erase the entire page and then the
bytes in the temporary buffer will be written to the selected page.
Frequently just a few bytes within a page must be updated while maintaining the state of the
other bytes. There are two options for handling this situation that allow the Flash data memory to
emulate a traditional EEPROM memory. The simplest method is to copy the entire page into a
buffer allocated in RAM, modify the desired byte locations in the RAM buffer, and then load and
write back the page to the Flash memory. This option requires that at least one page size of
RAM is available as a temporary buffer. The second option is to load the unmodified bytes of the
page directly into the Flash memory’s temporary load buffer before loading the updated values
of the modified bytes. For example, if just one byte needs modification, the user must first read
and load the unaffected bytes of into the page buffer. Then the modified byte value is stored to
the page buffer before starting the auto-erase sequence. This method reduces the amount of
RAM required; however, more software overhead is needed because the read-and-load-back
routine must skip those bytes in the page that need to be updated in order to prevent those loca-
tions in the buffer from being loaded with the previous data, as this will block the new data from
being loaded correctly.
A write sequence will not occur if the Brown-out Detector (BOD) is active, even if the BOD reset
has been disabled. In cases where the BOD reset is disabled, the user should check the BOD
status by reading the WRTINH bit in MEMCON. If a write currently in progress is interrupted by
the BOD due to a low voltage condition, the ABORT flag will be set. FDATA can always be read
regardless of the BOD state.
For more details on using the Flash Data Memory, see the application note titled “AT89LP Flash
Data Memory”. FDATA may also be programmed by an external device programmer (see
gramming the Flash Memory” on page
MWEN
MWEN
DMEN
MOVX
DMEN
MOVX
LDPG
LDPG
IDLE
IDLE
FDATA Byte Write
FDATA Page Write
t
WC
115).
t
WC
t
WC
AT89LP428/828
“Pro-
13

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