AT80C51RD2 Atmel Corporation, AT80C51RD2 Datasheet - Page 53

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AT80C51RD2

Manufacturer Part Number
AT80C51RD2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT80C51RD2

Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Uart
1
Sram (kbytes)
1.25
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Watchdog
Yes

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13.1
4113D–8051–01/09
Registers
Table 13-1.
KBF - Keyboard Flag Register (9Eh)
Reset Value = 0000 0000b
Number
KBF7
Bit
7
7
6
5
4
3
2
1
0
KBF Register
Mnemonic Description
KBF6
KBF7
KBF6
KBF5
KBF4
KBF3
KBF2
KBF1
KBF0
Bit
6
Keyboard line 7 flag
Set by hardware when the Port line 7 detects a programmed level. It generates a
Keyboard interrupt request if the KBKBIE.7 bit in KBIE register is set.
Must be cleared by software.
Keyboard line 6 flag
Set by hardware when the Port line 6 detects a programmed level. It generates a
Keyboard interrupt request if the KBIE.6 bit in KBIE register is set.
Must be cleared by software.
Keyboard line 5 flag
Set by hardware when the Port line 5 detects a programmed level. It generates a
Keyboard interrupt request if the KBIE.5 bit in KBIE register is set.
Must be cleared by software.
Keyboard line 4 flag
Set by hardware when the Port line 4 detects a programmed level. It generates a
Keyboard interrupt request if the KBIE.4 bit in KBIE register is set.
Must be cleared by software.
Keyboard line 3 flag
Set by hardware when the Port line 3 detects a programmed level. It generates a
Keyboard interrupt request if the KBIE.3 bit in KBIE register is set.
Must be cleared by software.
Keyboard line 2 flag
Set by hardware when the Port line 2 detects a programmed level. It generates a
Keyboard interrupt request if the KBIE.2 bit in KBIE register is set.
Must be cleared by software.
Keyboard line 1 flag
Set by hardware when the Port line 1 detects a programmed level. It generates a
Keyboard interrupt request if the KBIE.1 bit in KBIE register is set.
Must be cleared by software.
Keyboard line 0 flag
Set by hardware when the Port line 0 detects a programmed level. It generates a
Keyboard interrupt request if the KBIE.0 bit in KBIE register is set.
Must be cleared by software.
KBF5
5
KBF4
4
KBF3
3
KBF2
2
AT80C51RD2
KBF1
1
KBF0
0
53

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