AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 17

• Manufacturer Part Number: AT32UC3A3128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A3128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 110
• Ext Interrupts: 110
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 12
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7745C–AVR32–05/09
Figure 7-1. Typical BatchISP Command Line
For each operation, BatchISP displays the result.
BatchISP main commands available on AT32UC3xxxxx are:
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The AT32UC3xxxxx memories made available by BatchISP are:
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ASSERT { PASS | FAIL }
to the expected behavior.
ONFAIL { ASK | ABORT | RETRY | IGNORE }
case of failure.
WAIT <Nsec>
ECHO <comment>
ERASE F
MEMORY { FLASH | SECURITY | CONFIGURATION | BOOTLOADER | SIGNATURE | USER }
target memory on which to apply the following operations.
ADDRANGE <addrMin> <addrMax>
which to apply the following operations.
BLANKCHECK
FILLBUFFER <data>
LOADBUFFER { <in_elffile> | <in_hexfile> }
PROGRAM
VERIFY
READ
SAVEBUFFER <out_hexfile> { HEX386 | HEX86 }
START { RESET | NORESET } 0
optional hardware reset of the target.
FLASH
protected area. E.g. on AT32UC3A0512 (512-kB internal flash), addresses from 0 to
0x7FFFF can be accessed in this memory.
SECURITY
the value of the target Security bit which can only be set to 1. Once set, the only accepted
commands will be
until the end of the non-volatile ISP session, even if the Security bit is set.
CONFIGURATION
least significant bit of each byte reflects the value of the corresponding GP fuse bit.
reads the selected address range to the ISP buffer.
: This memory is the internal flash array of the target, including the bootloader
verifies that the selected address range has the same contents as the ISP buffer.
erases internal flash contents, except the bootloader.
programs the selected address range with the ISP buffer.
: This memory contains only one byte. The least significant bit of this byte reflects
checks that the selected address range is erased.
inserts a pause between two ISP operations.
: This memory contains one byte per target general-purpose fuse bit. The
displays a message.
ERASE
fills the ISP buffer with a byte value.
changes the displayed results of the following operations according
and
START
starts the execution of the programmed application with an
selects in the current target memory an address range on
. After an
changes the interactive behavior of BatchISP in
ERASE
loads the ISP buffer from an input file.
saves the ISP buffer to an output file.
command, all commands are accepted
selects a
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