SC28L92A1A,512 NXP Semiconductors, SC28L92A1A,512 Datasheet - Page 27

IC UART DUAL W/FIFO 44-PLCC

SC28L92A1A,512

Manufacturer Part Number
SC28L92A1A,512
Description
IC UART DUAL W/FIFO 44-PLCC
Manufacturer
NXP Semiconductors
Series
IMPACTr
Datasheet

Specifications of SC28L92A1A,512

Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
16 Byte
Voltage - Supply
3.3V, 5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
44-LCC (J-Lead)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935263293512
SC28L92A1A
SC28L92A1A

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SC28L92A1A,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
SC28L92_7
Product data sheet
Table 24.
Table 25.
[1]
Table 26.
[1]
Bit
3
2
1
0
RxINT[2:1] (bits MR0[6] and MR1[6])
FIFOSIZE = 0 (8 bytes)
00
01
10
11
FIFOSIZE = 1 (16 bytes)
00
01
10
11
TxINT[1:0] (bits MR0[5:4])
FIFOSIZE = 0 (8 bytes)
00
01
10
11
FIFOSIZE = 1 (16 bytes)
00
01
10
11
Interrupt fill level must be set when the transmit and receive FIFOs are empty, otherwise the new level takes
effect only after a read or a write to the FIFO.
Interrupt fill level must be set when the transmit and receive FIFOs are empty, otherwise the new level takes
effect only after a read or a write to the FIFO.
Symbol
FIFOSIZE
BAUDRATE
EXTENDED I
TEST2
BAUDRATE
EXTENDED II
MR0A - Mode Register 0 channel A (address 0x0) bit description
Receiver FIFO interrupt fill level
Transmitter FIFO interrupt fill level
Rev. 07 — 19 December 2007
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter
Description
FIFO size for channel A and channel B. Selects the FIFO depth at
8-byte or 16-byte.
Bits MR0[2:0] are used to select one of the six baud rate groups. See
Table 35
Other combinations of MR0[2:0] should not be used.
0 = 8 bytes
1 = 16 bytes
000 = Normal mode
001 = Extended mode I
100 = Extended mode II
for the group organization.
[1]
[1]
Interrupt condition
1 or more bytes in FIFO (RxRDY)
3 or more bytes in FIFO
6 or more bytes in FIFO
8 bytes in FIFO (RxFULL)
1 or more bytes in FIFO (RxRDY)
8 or more bytes in FIFO
12 or more bytes in FIFO
16 bytes in FIFO (RxFULL)
Interrupt condition
8 bytes empty (TxEMPTY)
4 or more bytes empty
6 or more bytes empty
1 or more bytes empty (TxRDY)
16 bytes empty (TxEMPTY)
8 or more bytes empty
12 or more bytes empty
1 or more bytes empty (TxRDY)
SC28L92
© NXP B.V. 2007. All rights reserved.
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