SC16C754BIBM,151 NXP Semiconductors, SC16C754BIBM,151 Datasheet - Page 9

• Manufacturer Part Number: SC16C754BIBM,151
• Description: IC UART QUAD W/FIFO 64-LQFP
• Manufacturer: NXP Semiconductors

Specifications of SC16C754BIBM,151

• Number Of Channels: 4, QUART
• Package / Case: 64-LQFP
• Fifo's: 64 Byte
• Voltage - Supply: 2.5V, 3.3V, 5V
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Data Rate: 5 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.25 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2.5 V or 3.3 V or 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-3290; 935279069151; SC16C754BIBM-S

NXP Semiconductors
Table 2.
6. Functional description
SC16C754B_4
Product data sheet
Symbol
V
XTAL1
XTAL2
CC
Pin
LQFP64 LQFP80 PLCC68
4, 21,
35, 52
25
26
Pin description
6.1 Trigger levels
6, 46, 66 13, 47,
31
32
The SC16C754B UART is pin-compatible with the SC16C554 and SC16C654 UARTs. It
provides more enhanced features. All additional features are provided through a special
enhanced feature register.
The UART will perform serial-to-parallel conversion on data characters received from
peripheral devices or modems, and parallel-to-parallel conversion on data characters
transmitted by the processor. The complete status of each channel of the SC16C754B
UART can be read at any time during functional operation by the processor.
The SC16C754B can be placed in an alternate mode (FIFO mode) relieving the processor
of excessive software overhead by buffering received/transmitted characters. Both the
receiver and transmitter FIFOs can store up to 64 bytes (including three additional bits of
error status per byte for the receiver FIFO) and have selectable or programmable trigger
levels. Primary outputs RXRDY and TXRDY allow signalling of DMA transfers.
The SC16C754B has selectable hardware flow control and software flow control.
Hardware flow control significantly reduces software overhead and increases system
efficiency by automatically controlling serial data flow using the RTS output and CTS input
signals. Software flow control automatically controls data flow by using programmable
Xon/Xoff characters.
The UART includes a programmable baud rate generator that can divide the timing
reference clock input by a divisor between 1 and (2
The SC16C754B provides independent selectable and programmable trigger levels for
both receiver and transmitter DMA and interrupt generation. After reset, both transmitter
and receiver FIFOs are disabled and so, in effect, the trigger level is the default value of
one byte. The selectable trigger levels are available via the FIFO Control Register (FCR).
The programmable trigger levels are available via the Trigger Level Register (TLR).
…continued
64
35
36
Type
I
I
O
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
Rev. 04 — 6 October 2008
Description
Power supply input.
Crystal or external clock input. Functions as a crystal input or as an
external clock input. A crystal can be connected between XTAL1 and
XTAL2 to form an internal oscillator circuit (see
an external clock can be connected to this pin to provide custom data
rates.
Output of the crystal oscillator or buffered clock (see also XTAL1).
XTAL2 is used as a crystal oscillator output or a buffered clock output.
16
1).
SC16C754B
Figure
© NXP B.V. 2008. All rights reserved.
14). Alternatively,
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