DS2151QB+ Maxim Integrated Products, DS2151QB+ Datasheet - Page 9

• Manufacturer Part Number: DS2151QB+
• Description: IC TXRX T1 1-CHIP 5V LP 44-PLCC
• Manufacturer: Maxim Integrated Products

Specifications of DS2151QB+

• Function: Single-Chip Transceiver
• Interface: T1
• Number Of Circuits: 1
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 65mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-LCC, 44-PLCC
• Includes: Alarm Detector and Generator, CSU Loop Codes Generator and Detector, DSX-1 and CSU Line Build-Outs Generator
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

DS2151Q
3 PARALLEL PORT
The DS2151Q is controlled via a multiplexed bidirectional address/data bus by an external
microcontroller or microprocessor. The DS2151Q can operate with either Intel or Motorola bus timing
configurations. If the BTS pin is tied low, Intel timing will be selected; if tied high, Motorola timing will
be selected. All Motorola bus signals are listed in parentheses (). See the timing diagrams in Section
14
for more details. The multiplexed bus on the DS2151Q saves pins because the address information and
data information share the same signal paths. The addresses are presented to the pins in the first portion of
the bus cycle and data will be transferred on the pins during second portion of the bus cycle. Addresses
must be valid prior to the falling edge of ALE (AS), at which time the DS2151Q latches the address from
the AD0 to AD7 pins. Valid write data must be present and held stable during the later portion of the DS
or
pulses. In a read cycle, the DS2151Q outputs a byte of data during the latter portion of the DS or
WR
pulses. The read cycle is terminated and the bus returns to a high impedance state as
transitions
RD
RD
high in Intel timing or as DS transitions low in Motorola timing. The DS2151Q can also be easily
connected to nonmultiplexed buses. Refer to the separate application note for a detailed discussion of this
topic.
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