DS2151QB+ Maxim Integrated Products, DS2151QB+ Datasheet - Page 3

• Manufacturer Part Number: DS2151QB+
• Description: IC TXRX T1 1-CHIP 5V LP 44-PLCC
• Manufacturer: Maxim Integrated Products

Specifications of DS2151QB+

• Function: Single-Chip Transceiver
• Interface: T1
• Number Of Circuits: 1
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 65mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-LCC, 44-PLCC
• Includes: Alarm Detector and Generator, CSU Loop Codes Generator and Detector, DSX-1 and CSU Line Build-Outs Generator
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

DS2151Q
LIST OF FIGURES
Figure 1-1. DS2151Q Block Diagram ......................................................................................................... 5
Figure 13-1. External Analog Connections............................................................................................... 43
Figure 13-2. Jitter Tolerance .................................................................................................................... 43
Figure 13-3. Transmit Waveform Template .............................................................................................. 44
Figure 13-4. Jitter Attenuation .................................................................................................................. 45
Figure 14-1. Receive Side D4 Timing....................................................................................................... 46
Figure 14-2. Receive Side ESF Timing .................................................................................................... 46
Figure 14-3. Receive Side Boundary Timing with Elastic Store(s) Disabled ............................................ 47
Figure 14-4. 1.544MHz Boundary Timing with Elastic Store(s) Enabled.................................................. 47
Figure 14-5. 2.048MHz Boundary Timing with Elastic Store(s) Enabled.................................................. 48
Figure 14-6. Transmit Side D4 Timing...................................................................................................... 48
Figure 14-7. Transmit Side ESF Timing ................................................................................................... 49
Figure 14-8. Transmit Side Boundary Timing with Elastic Store(s) Disabled ........................................... 50
Figure 14-9. Transmit Data Flow .............................................................................................................. 51
Figure 16-1. Intel Bus Read AC Timing.................................................................................................... 54
Figure 16-2. Intel Bus Write AC Timing .................................................................................................... 54
Figure 16-3. Motorola Bus AC Timing ...................................................................................................... 55
Figure 16-4. Receive Side AC Timing ...................................................................................................... 57
Figure 16-5. Transmit Side AC Timing ..................................................................................................... 59
LIST OF TABLES
Table 4-1. Output Pin Test Modes............................................................................................................ 13
Table 5-1. Receive T1 Level Indication .................................................................................................... 21
Table 5-2. Alarm Set and Clear Criteria ................................................................................................... 23
Table 6-1. Line Code Violation Counting Arrangements .......................................................................... 27
Table 6-2. Path Code Violation Counting Arrangements.......................................................................... 28
Table 6-3. Multiframes Out of Sync Counting Arrangements ................................................................... 29
Table 13-1. Source of RCLK Upon RCL................................................................................................... 40
Table 13-2. LBO Select in LICR ............................................................................................................... 41
Table 13-3. Transformer Specifications.................................................................................................... 41
Table 13-4. Crystal Selection Guidelines ................................................................................................. 42
Table 15-1. Recommended DC Characteristics ....................................................................................... 52
Table 15-2. Capacitance .......................................................................................................................... 52
Table 15-3. DC Characteristics ................................................................................................................ 52
Table 16-1. AC Characteristics—Parallel Port ......................................................................................... 53
Table 16-2. AC Characteristics—Receive Side ........................................................................................ 56
Table 16-3. AC Characteristics—Transmit Side ....................................................................................... 58
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