DS2156L+ Maxim Integrated Products, DS2156L+ Datasheet - Page 218

• Manufacturer Part Number: DS2156L+
• Description: IC TXRX T1/E1/J1 1-CHIP 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS2156L+

• Function: Single-Chip Transceiver
• Interface: E1, J1, T1, TDM, UTOPIA II
• Number Of Circuits: 1
• Voltage - Supply: 3.14 V ~ 3.47 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Includes: BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

29.
The extended system information bus (ESIB) allows up to eight DS2156s to share an 8-bit CPU bus for
reporting alarms and interrupt status as a group. With a single bus read, the host can be updated with
alarm or interrupt status from all members of the group. There are two control registers (ESIBCR1 and
ESIBCR2) and four information registers (ESIB1, ESIB2, ESIB3, and ESIB4). For example, eight
DS2156s can be grouped into an ESIB group. A single read of the ESIB1 register of any member of the
group yields the interrupt status of all eight DS2156s. Therefore, the host can determine which device or
devices are causing an interrupt without polling all eight devices. Through ESIB2, the host can gather
synchronization status on all members of the group. ESIB3 and ESIB4 can be programmed to report
various alarms on a device-by-device basis.
There are three device pins involved in forming an ESIB group: ESIBS0, ESIBS1, and ESIBRD. A 10kΩ
pullup resistor must be provided on ESIBS0, ESIBS1, and ESIBRD.
Figure 29-1. ESIB Group of Four DS2156s
EXTENDED SYSTEM INFORMATION BUS (ESIB)
CPU I/F
CPU I/F
CPU I/F
CPU I/F
DS2156 # 1
DS2156 # 2
DS2156 # 3
DS2156 # 4
ESIBRD
ESIBRD
ESIBRD
ESIBRD
ESIB1
ESIB0
ESIB1
ESIB1
ESIB0
ESIB0
ESIB0
ESIB1
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V
DD
10kΩ (3)