DS2156L+ Maxim Integrated Products, DS2156L+ Datasheet - Page 21

IC TXRX T1/E1/J1 1-CHIP 100-LQFP

DS2156L+

Manufacturer Part Number
DS2156L+
Description
IC TXRX T1/E1/J1 1-CHIP 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS2156L+

Function
Single-Chip Transceiver
Interface
E1, J1, T1, TDM, UTOPIA II
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Signal Name:
Signal Description:
Signal Type:
Demand clock for the transmit link data [TLINK] input.
T1 Mode: A 4kHz or 2kHz (ZBTSI) clock.
E1 Mode: A 4kHz to 20kHz clock.
Signal Name:
Signal Description:
Signal Type:
If enabled, this pin is sampled on the falling edge of TCLK for data insertion into either the FDL stream (ESF) or
the Fs-bit position (D4), or the Z-bit position (ZBTSI) or any combination of the Sa-bit positions (E1).
Signal Name:
Signal Description:
Signal Type:
A pulse at this pin establishes either frame or multiframe boundaries for the transmit side. Can be programmed to
output either a frame or multiframe pulse. If this pin is set to output pulses at frame boundaries, it can also be set by
IOCR1.3 to output double-wide pulses at signaling frames in T1 mode.
Signal Name:
Signal Description:
Signal Type:
Only used when the transmit-side elastic store is enabled. A pulse at this pin establishes either frame or multiframe
boundaries for the transmit side. Should be connected low in applications that do not use the transmit-side elastic
store.
Signal Name:
Signal Description:
Signal Type:
When enabled, this input samples signaling bits for insertion into outgoing PCM data stream. Sampled on the
falling edge of TCLK when the transmit-side elastic store is disabled. Sampled on the falling edge of TSYSCLK
when the transmit-side elastic store is enabled.
Signal Name:
Signal Description:
Signal Type:
Updated on the rising edge of TCLK with data out of the transmit-side elastic store whether the elastic store is
enabled or not. This pin is normally connected to TDATA.
Signal Name:
Signal Description:
Signal Type:
Sampled on the falling edge of TCLK with data to be clocked through the transmit-side formatter. This pin is
normally connected to TESO.
TLCLK
Transmit Link Clock
Output
TLINK
Transmit Link Data
Input
TSYNC
Transmit Sync
Input/Output
TSSYNC
Transmit System Sync
Input
TSIG
Transmit Signaling Input
Input
TESO
Transmit Elastic Store Data Output
Output
TDATA
Transmit Data
Input
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