P87C554SBAA NXP Semiconductors, P87C554SBAA Datasheet - Page 72

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P87C554SBAA

Manufacturer Part Number
P87C554SBAA
Description
MCU 8-Bit 87C 80C51 CISC 16KB EPROM 5V 68-Pin PLCC Tube
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P87C554SBAA

Package
68PLCC
Device Core
80C51
Family Name
87C
Maximum Speed
16 MHz
Ram Size
512 Byte
Program Memory Size
16 KB
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Program Memory Type
EPROM
Number Of Programmable I/os
40
Interface Type
I2C/UART
On-chip Adc
7-chx10-bit
Operating Temperature
0 to 70 °C
Number Of Timers
3

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Part Number
Manufacturer
Quantity
Price
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Part Number:
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Quantity:
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Part Number:
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Manufacturer:
NXP Semiconductors
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2. Idle Mode:
3. Power Down Mode:
Philips Semiconductors
2003 Jan 28
80C51 8-bit microcontroller – 6-clock operation
16K/512 OTP/ROMless, 7 channel 10 bit A/D, I
high I/O, 64L LQFP
a. The following pins must be forced to V
b. The following pins must be forced to V
c. Ports 1.6 and 1.7 should be connected to V
d. The following pins must be disconnected: XTAL2 and all pins not specified above.
a. The following pins must be forced to V
b. The following pins must be forced to V
c. Ports 1.6 and 1.7 should be connected to V
d. The following pins must be disconnected: XTAL2 and all pins not specified above.
cannot exceed the I
cannot exceed the I
OL1
OL1
spec of these pins. These pins must not have logic 0 written to them prior to this measurement.
spec of these pins. These pins must not have logic 0 written to them prior to this measurement.
Figure 60. Clock Signal Waveform for I
CLOCK SIGNAL
V
DD
0.5V
–0.5
All other pins are disconnected. V
DD
SS
DD
SS
Figure 61. I
V
: RST, STADC, AV
: RST, STADC, XTAL1, AV
: Port 0 and EW.
: Port 0 and EW.
V
DD
(NC)
DD
(NC)
DD
DD
Figure 59. I
through resistors of sufficiently high value such that the sink current into these pins
through resistors of sufficiently high value such that the sink current into these pins
All other pins are disconnected
0.2V
t
CHCL
0.7V
DD
DD
t
Test Condition, Power Down Mode
DD
CLCH
–0.1
P1.6
P1.7
RST
XTAL2
XTAL1
V
P1.6
P1.7
RST
STADC
XTAL2
XTAL1
V
STADC
DD
SS
SS
Test Condition, Idle Mode
ss
2
= t
, AV
C, PWM, capture/compare,
CHCL
72
t
CLCX
ref–
ss
DD
, and EA.
, AV
= 5 ns
t
Tests in Active and Idle Modes
CLCL
AV
AV
ref–
AV
AV
V
V
DD
ref–
ref–
DD
DD
EW
EW
EA
SS
EA
SS
P0
P0
, and EA.
t
CHCX
= 2 V to 5.5 V
t
CLCH
2
I
I
DD
DD
V
V
V
V
SU00220
DD
DD
DD
DD
SU00221
SU00219
3
80C554/87C554
Product data

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