DSPB56364FU100 Freescale Semiconductor, DSPB56364FU100 Datasheet - Page 81

• Manufacturer Part Number: DSPB56364FU100
• Manufacturer: Freescale Semiconductor

Specifications of DSPB56364FU100

• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 9KB
• Program Memory Size: 24KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.14V
• Operating Supply Voltage (max): 3.46V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / Rohs Status: Not Compliant

5.3
Power dissipation is a key issue in portable DSP applications. Some of the factors which affect current
consumption are described in this section. Most of the current consumed by CMOS devices is alternating
current (ac), which is charging and discharging the capacitances of the pins and internal nodes.
Current consumption is described by the following formula:
where
The maximum internal current (I
on best-case operation conditions, which is not necessarily a real application case. The typical internal
current (I
For applications that require very low current consumption, do the following:
One way to evaluate power consumption is to use a current per MIPS measurement methodology to
minimize specific board effects (i.e., to compensate for measured board current not caused by the DSP).
Freescale Semiconductor
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For a Port A address pin loaded with 50 pF capacitance, operating at 3.3 V, and with a 100
MHz clock, toggling at its maximum possible rate (50 MHz), the current consumption is
All inputs must be terminated (i.e., not allowed to float) using CMOS levels, except for the three
pins with internal pull-up resistors (TMS, TDI, TCK).
Take special care to minimize noise levels on the V
If multiple DSP56364 devices are on the same board, check for cross-talk or excessive spikes on
the supplies due to synchronous operation of the devices.
RESET must be asserted when the chip is powered up. A stable EXTAL signal must be supplied
before deassertion of RESET.
At power-up, ensure that the voltage difference between the 5 V tolerant pins and the chip V
never exceeds 3.95 V.
Set the EBD bit when not accessing external memory.
Minimize external memory accesses and use internal memory accesses.
Minimize the number of pins that are switching.
Minimize the capacitive load on the pins.
Connect the unused inputs to pull-up or pull-down resistors.
Disable unused peripherals.
CCItyp
Power Consumption Considerations
C
V
f
) value reflects the average switching of the internal buses on typical operating conditions.
= node/pin capacitance
= voltage swing
= frequency of node/pin toggle
CCI
I
=
max) value reflects the typical possible switching of the internal buses
Example 1. Current Consumption
DSP56364 Technical Data, Rev. 4.1
50 10
×
–
12
I
×
=
3.3
C V
×
×
50
CCP
×
×
f
10
and GND
6
=
8.25mA
Power Consumption Considerations
P
pins.
CC
5-3