DSPB56364FU100 Freescale Semiconductor, DSPB56364FU100 Datasheet - Page 80

• Manufacturer Part Number: DSPB56364FU100
• Manufacturer: Freescale Semiconductor

Specifications of DSPB56364FU100

• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 9KB
• Program Memory Size: 24KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.14V
• Operating Supply Voltage (max): 3.46V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / Rohs Status: Not Compliant

Electrical Design Considerations
As noted above, the junction-to-case thermal resistances quoted in this data sheet are determined using the
first definition. From a practical standpoint, that value is also suitable for determining the junction
temperature from a case thermocouple reading in forced convection environments. In natural convection,
using the junction-to-case thermal resistance to estimate junction temperature from a thermocouple
reading on the case of the package will estimate a junction temperature slightly hotter than actual
temperature. Hence, the new thermal metric, thermal characterization parameter or Ψ
to be (T
when using the surface temperature of the package. Remember that surface temperature readings of
packages are subject to significant errors caused by inadequate attachment of the sensor to the surface and
to errors caused by heat loss to the sensor. The recommended technique is to attach a 40-gauge
thermocouple wire and bead to the top center of the package with thermally conductive epoxy.
5.2
Use the following list of recommendations to assure correct DSP operation:
5-2
•
•
•
•
•
•
•
•
To define a value approximately equal to a junction-to-board thermal resistance, the thermal
resistance is measured from the junction to where the leads are attached to the case.
If the temperature of the package case (T
is computed using the value obtained by the equation:
Provide a low-impedance path from the board power supply to each V
the board ground to each GND pin.
Use at least six 0.01–0.1 μF bypass capacitors positioned as close as possible to the four sides of
the package to connect the V
Ensure that capacitor leads and associated printed circuit traces that connect to the chip V
GND pins are less than 1.2 cm (0.5 inch) per capacitor lead.
Use at least a four-layer PCB with two inner layers for V
Because the DSP output signals have fast rise and fall times, PCB trace lengths should be minimal.
This recommendation particularly applies to the address and data buses as well as the IRQA,
IRQB, IRQD, and TA pins. Maximum PCB trace lengths on the order of 15 cm (6 inches) are
recommended.
Consider all device loads as well as parasitic capacitance due to PCB traces when calculating
capacitance. This is especially critical in systems with higher capacitive loads that could create
higher transient currents in the V
J
– T
Electrical Design Considerations
T
)/P
This device contains circuitry protecting against damage due to high static
voltage or electrical fields. However, normal precautions should be taken to
avoid exceeding maximum voltage ratings. Reliability of operation is
enhanced if unused inputs are tied to an appropriate logic voltage level (e.g.,
either GND or V
is 10 k ohm.
D
. This value gives a better estimate of the junction temperature in natural convection
CC
). The suggested value for a pull-up or pull-down resistor
CC
DSP56364 Technical Data, Rev. 4.1
power source to GND.
CC
and GND circuits.
CAUTION
T
) is determined by a thermocouple, the thermal resistance
(
T
J
–
T
T
) P
⁄
D
CC
and GND.
CC
pin on the DSP and from
Freescale Semiconductor
JT
, has been defined
CC
and