DSPB56364FU100 Freescale Semiconductor, DSPB56364FU100 Datasheet - Page 7

• Manufacturer Part Number: DSPB56364FU100
• Manufacturer: Freescale Semiconductor

Specifications of DSPB56364FU100

• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 9KB
• Program Memory Size: 24KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.14V
• Operating Supply Voltage (max): 3.46V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / Rohs Status: Not Compliant

2.2
2.3
Freescale Semiconductor
Ground Name
Power Name
V
GND
V
GND
GND
V
V
V
V
CCHQ
CCLQ
GND
CCA
CCD
CCC
CCS
V
CCP
Q
A
D
(4)
(1)
(1)
(3)
Power
Ground
P
(4)
(4)
(4)
(1)
(4)
PLL Power—V
be provided with an extremely low impedance path to the V
Quiet Core (Low) Power—V
tied externally to all other chip power inputs. The user must provide adequate external decoupling
capacitors. There are four V
Quiet External (High) Power—V
externally to all other chip power inputs. The user must provide adequate decoupling capacitors. There are
four V
Address Bus Power—V
I/O drivers. This input must be tied externally to all other chip power inputs. The user must provide adequate
external decoupling capacitors. There are four V
Data Bus Power—V
tied externally to all other chip power inputs. The user must provide adequate external decoupling
capacitors. There is one V
Bus Control Power—V
externally to all other chip power inputs. The user must provide adequate external decoupling capacitors.
There is one V
SHI and ESAI —V
other chip power inputs
V
PLL Ground—GND
extremely low-impedance path to ground. V
located as close as possible to the chip package. There is one GND
Quiet Ground—GND
externally to all other chip ground connections. The user must provide adequate external decoupling
capacitors. There are four GND
Address Bus Ground—GND
connection must be tied externally to all other chip ground connections. The user must provide adequate
external decoupling capacitors. There are four GND
Data Bus Ground—GND
must be tied externally to all other chip ground connections. The user must provide adequate external
decoupling capacitors. There is one GND
CCS
CCHQ
inputs.
inputs.
CCC
CCP
CCS
inputs.
is V
P
CCD
Q
is ground-dedicated for PLL use. The connection should be provided with an
CC
L
is an isolated power for the SHI and ESAI. This input must be tied externally to all
is an isolated ground for the internal processing logic. This connection must be tied
CCC
. The user must provide adequate external decoupling capacitors. There are three
CCA
DSP56364 Technical Data, Rev. 4.1
is an isolated power for sections of the data bus I/O drivers. This input must be
D
dedicated for PLL use. The voltage should be well-regulated and the input should
CCD
is an isolated ground for sections of the data bus I/O drivers. This connection
CCLQ
is an isolated power for the bus control I/O drivers. This input must be tied
CCLQ
Table 2-2 Power Inputs
is an isolated power for sections of the address bus
A
inputs.
Q
is an isolated ground for sections of the address bus I/O drivers. This
Table 2-3 Grounds
inputs.
CCHQ
connections.
is an isolated power for the internal processing logic. This input must be
is a quiet power source for I/O lines. This input must be tied
D
connections.
CCP
Description
Description
should be bypassed to GND
CCA
A
inputs.
connections.
CC
power rail. There is one V
P
connection.
P
by a 0.47 μF capacitor
CCP
input.
Power
2-3