DSPB56364FU100 Freescale Semiconductor, DSPB56364FU100 Datasheet - Page 40

• Manufacturer Part Number: DSPB56364FU100
• Manufacturer: Freescale Semiconductor

Specifications of DSPB56364FU100

• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 9KB
• Program Memory Size: 24KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.14V
• Operating Supply Voltage (max): 3.46V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / Rohs Status: Not Compliant

External Memory Expansion Port (Port A)
3-24
1
2
3
4
5
6
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
No.
The number of wait states for Page mode access is specified in the DCR.
The refresh period is specified in the DCR.
The asynchronous delays specified in the expressions are valid for
All the timings are calculated for the worst case. Some of the timings are better for specific cases (e.g., t
read-after-read or write-after-write sequences).
BRW[1:0] (DRAM control register bits) defines the number of wait states that should be inserted in each DRAM out-of-page
access.
RD deassertion will always occur after CAS deassertion; therefore, the restricted timing is t
Column address valid to CAS assertion
CAS assertion to column address not valid
Last column address valid to RAS deassertion
WR deassertion to CAS assertion
CAS deassertion to WR assertion
CAS assertion to WR deassertion
WR assertion pulse width
Last WR assertion to RAS deassertion
WR assertion to CAS deassertion
Data valid to CAS assertion (write)
CAS assertion to data not valid (write)
WR assertion to CAS assertion
Last RD assertion to RAS deassertion
RD assertion to data valid
RD deassertion to data not valid
WR assertion to data active
WR deassertion to data high impedance
Table 3-12 DRAM Page Mode Timings, Four Wait States
Characteristics
6
DSP56364 Technical Data, Rev. 4.1
DSP56364
Symbol
t
t
t
t
t
t
t
t
t
t
WCH
t
CWL
WCS
ASC
CAH
RCS
RCH
RWL
t
t
ROH
t
t
RAL
WP
DH
GA
DS
GZ
.
1.25 × T
3.25 × T
4.75 × T
3.75 × T
1.25 × T
3.25 × T
0.75 × T
1.25 × T
3.5 × T
4.5 × T
0.5 × T
3.5 × T
4.5 × T
Expression
5 × T
1, 2, 3
0.25 × T
T
C
− 4.0
C
C
C
C
C
C
C
C
C
C
C
C
C
C
− 4.0
(continued)
OFF
− 4.0
− 4.5
− 4.0
− 4.0
− 4.0
− 4.0
− 4.2
− 4.3
− 4.3
− 7.0
− 0.3
− 4.3
− 4.0
C
4
and not t
Freescale Semiconductor
31.0
46.0
28.3
40.5
43.2
33.2
31.0
41.0
Min
6.0
8.5
8.5
1.0
8.2
0.0
7.2
—
—
PC
GZ
equals 3 × T
.
Max
25.5
2.5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
C
for