TXC02050AIPL Transwitch Corporation, TXC02050AIPL Datasheet - Page 7

TXC02050AIPL

Manufacturer Part Number
TXC02050AIPL
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC02050AIPL

Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
PLCC
Rad Hardened
No
Lead Free Status / Rohs Status
Not Compliant
Pins With External Components
Symbol
Symbol
TXAIS
VCOC
AGFIL
EQB1
EQB0
PLLC
Pin No.
Pin No.
27
28
43
17
22
7
I/O/P
I/O/P
I/O
I/O
I/O
I
I
I
CMOSr
CMOSr
Analog
Analog
Analog
Type
Type
- 7 -
Equalizer Bit 1: MSB of equalizer setting.
Equalizer Bit 0: LSB of equalizer setting. Equalization
is as follows for 34 Mbit/s operation:
EQB1
* f = 1/2 the bit rate
Transmit AIS: When TXAIS is low, the MRT sends an
AIS (all ones signal) for the line side transmit output
data. The terminal side transmit data path is disabled.
The reference clock (DCK) provides the clock required
for generating AIS.
Voltage Controlled Oscillator Capacitor: For 6, 8,
and 34 Mbit/s operation, a 470
tor is connected in series with a 0.1 F
tor to ground. These components are used in the
phase-locked loop filter.
Phase-Locked Loop Capacitor: 0.1 F
ceramic disk capacitor connected to ground.
Automatic Gain Filter: For 6/8 MHz mode, 0.01 F
10% ceramic disk capacitor connected to ground. For
34 Mbit/s mode, open.
1
1
0
0
1
1
For 8 or 6 Mbit/s operation:
EQB0 CABLE EQUALIZATION f *
1
0
0
1
1
0
2.5dB<cable<6.5dB
0dB< cable <3.5dB
2.6dB<cable<8dB
6dB<cable<9.9dB
8.6dB<cable<13.2dB
0dB< cable< 4.1dB
Name/Function
Name/Function
5%, 1/8 watt resis-
10% capaci-
Ed. 3, April 1994
10%
TXC-02050-MB
MRT

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