CY7C166-15VC Cypress Semiconductor Corp, CY7C166-15VC Datasheet - Page 5

• Manufacturer Part Number: CY7C166-15VC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C166-15VC

• Density: 64Kb
• Access Time (max): 15ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 5V
• Address Bus: 14b
• Package Type: SOJ
• Operating Temp Range: 0C to 70C
• Number Of Ports: 1
• Supply Current: 115mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 24
• Word Size: 4b
• Number Of Words: 16K
• Lead Free Status / Rohs Status: Not Compliant

AC Test Loads and Waveforms
Switching Characteristics
Over the Operating Range
Document #: 38-05025 Rev. *C
OUTPUT
READ CYCLE
t
t
t
t
t
t
t
t
t
t
t
WRITE CYCLE
t
t
t
t
t
t
t
t
t
t
Notes
Equivalent to:
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
4. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V, and output loading of the specified
5. At any given temperature and voltage condition, t
6. t
7. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a
INCLUDING
I
write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
OL
HZCE
5 V
Parameter
/I
JIG AND
OH
SCOPE
and t
and 30 pF load capacitance.
30 pF
OUTPUT
HZWE
[7]
are specified with C
(a)
THÉ VENIN EQUIVALENT
R1 481
Read cycle time
Address to data valid
Output hold from address change
CE LOW to data valid
OE LOW to data valid
OE LOW to low Z
OE HIGH to high Z
CE LOW to low Z
CE HIGH to high Z
CE LOW to power-up
CE HIGH to power-down
Write cycle time
CE LOW to write end
Address set-up to write end
Address hold from write end
Address set-up to write start
WE pulse width
Data set-up to write end
Data hold from write end
WE HIGH to low Z
WE LOW to high Z
R2
255
[4]
167
L
= 5 pF as in part (b) in AC Test Loads. Transition is measured 500 mV from steady-state voltage.
OUTPUT
INCLUDING
5 V
JIG AND
1.73 V
SCOPE
[5]
[5]
HZCE
[5, 6]
[5, 6]
5 pF
is less than t
Description
(b)
R1 481
LZCE
for any given device. These parameters are guaranteed by design and not 100% tested.
R2
255
C164–5
GND
3.0 V
< 5 ns
10%
Min
15
15
12
12
12
10
ALL INPUT PULSES
–
3
–
–
3
–
3
–
0
–
0
0
0
5
–
CY7C166-15
90%
Max
15
15
10
15
–
–
–
8
–
8
–
–
–
–
–
–
–
–
–
–
7
90%
10%
CY7C166
< 5 ns
Unit
Page 5 of 12
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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