CY7C166-15VC Cypress Semiconductor Corp, CY7C166-15VC Datasheet

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CY7C166-15VC

Manufacturer Part Number
CY7C166-15VC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C166-15VC

Density
64Kb
Access Time (max)
15ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Address Bus
14b
Package Type
SOJ
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
115mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
24
Word Size
4b
Number Of Words
16K
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C166-15VC
Manufacturer:
CY
Quantity:
1 725
Part Number:
CY7C166-15VC
Manufacturer:
CY
Quantity:
1 481
Part Number:
CY7C166-15VC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
16 K × 4 Static RAM
Features
Cypress Semiconductor Corporation
Document #: 38-05025 Rev. *C
Logic Block Diagram
High speed
Output enable (OE) feature
CMOS for optimum speed/power
Low active power
Low standby power
TTL-compatible inputs and outputs
Automatic power-down when deselected
15 ns
633 mW
110 mW
A
A
A
A
A
A
A
A
1
2
3
4
5
6
7
8
INPUT BUFFER
DECODER
COLUMN
16K x 4
198 Champion Court
ARRAY
POWER
DOWN
Functional Description
The CY7C166 is a high-performance CMOS static RAMs
organized as 16,384 by 4 bits. Easy memory expansion is
provided by an active LOW Chip Enable (CE) and tri-state
drivers. The CY7C166 has an active LOW Output Enable (OE)
feature. This device has an automatic power-down feature,
reducing the power consumption by 65% when deselected.
Writing to the device is accomplished when the Chip Enable (CE)
and Write Enable (WE) inputs are both LOW (and the Output
Enable (OE) is LOW). Data on the four input/output pins (I/O
through I/O
address pins (A
Reading the device is accomplished by taking Chip Enable (CE)
LOW (and OE LOW), while Write Enable (WE) remains HIGH.
Under these conditions the contents of the memory location
specified on the address pins will appear on the four data I/O
pins.
The I/O pins stay in a high-impedance state when Chip Enable
(CE) is HIGH (or Output Enable (OE) is HIGH). A die coat is used
to insure alpha immunity.
3
San Jose
) is written into the memory location specified on the
0
through A
I/O
I/O
I/O
I/O
CE
(OE)
WE
3
2
1
0
,
16 K × 4 Static RAM
CA 95134-1709
13
).
Revised November 29, 2010
CY7C166
408-943-2600
0
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Related parts for CY7C166-15VC

CY7C166-15VC Summary of contents

Page 1

... The CY7C166 is a high-performance CMOS static RAMs organized as 16,384 by 4 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE) and tri-state drivers. The CY7C166 has an active LOW Output Enable (OE) feature. This device has an automatic power-down feature, reducing the power consumption by 65% when deselected. ...

Page 2

... Switching Characteristics ................................................ 5 Switching Waveforms ...................................................... 6 Read Cycle No. 1 ........................................................ 6 Read Cycle No. 2 ........................................................ 6 Write Cycle No. 1(WE Controlled) ............................... 7 Write Cycle No. 2(CE Controlled) ................................ 7 Typical DC and AC Characteristics ................................ 8 Document #: 38-05025 Rev. *C CY7C166 Truth Table ....................................................... 9 Address Designators ....................................................... 9 Ordering Information ........................................................ 9 Ordering Code Definitions ........................................... 9 Package Diagram ............................................................ 10 Acronyms ........................................................................ 10 Document Conventions ................................................. 10 Units of Measure ....................................................... 10 Document History Page ...

Page 3

... Pin Configuration Selection Guide Description Maximum Access Time (ns) Maximum Operating Current (mA) Maximum CMOS Standby Current (mA) Document #: 38-05025 Rev. *C SOJ Top View 7C166 GND CY7C166 CY7C166-15 15 115 20 Page [+] Feedback ...

Page 4

... Max > IH, Min Duty Cycle = 100% Max > V – 0 > V – 0 < 0 Test Conditions ° MHz 5 power-up, otherwise I will exceed values given CY7C166  10% –15 Min Max Unit 2.4 – V – 0 –0.5 0.8 V A –5 +5 A –5 +5 – 115 mA – ...

Page 5

... C164–5 (b) SCOPE Description [5] [5, 6] [5] [ less than t for any given device. These parameters are guaranteed by design and not 100% tested. HZCE LZCE CY7C166 ALL INPUT PULSES 90% 90% 10% 10% < CY7C166-15 Min Max Unit 15 – ns – – ns – – – ...

Page 6

... Read Cycle No ACE OE 7C166 t LZOE HIGH IMPEDANCE DATA OUT t LZCE SUPPLY CURRENT Notes HIGH for read cycle. 9. Device is continuously selected (CY7C166 10. Address valid prior to or coincident with CE transition LOW. Document #: 38-05025 Rev OHA DOE DATA VALID 50% also). IL CY7C166 DATA VALID t HZOE ...

Page 7

... The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 12. CY7C166 only: Data I/O will be high-impedance 13 goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. ...

Page 8

... AMBIENT TEMPERATURE (°C) TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 30.0 25.0 20.0 15 25°C A 5.0 0.0 0 200 400 600 800 1000 CAPACITANCE (pF) CY7C166 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 5. 25° 0.0 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs ...

Page 9

... A13 Ordering Information Speed (ns) Ordering Code 15 CY7C166-15VC Ordering Code Definitions 166 - Temperature range (Commercial 24-pin (300-Mil) Molded SOJ 15 = Speed grade Part Identifier Family Fast asynchronous SRAM Company ID Cypress Document #: 38-05025 Rev. *C Input/Output Mode High Z Deselect/power-down Data out Read Data in Write High Z ...

Page 10

... J-lead TTL transistor-transistor logic WE write enable Document #: 38-05025 Rev. *C 51-85030 *C Document Conventions Units of Measure Symbol Unit of Measure ns nano seconds V Volts µA micro Amperes mA milli Amperes mV milli Volts mW milli Watts pF pico Farad °C degree Celcius W Watts % percent CY7C166 Page [+] Feedback ...

Page 11

... Document History Page Document Title: CY7C166 16 K × 4 Static RAM Document Number: 38-05025 Orig. of REV. ECN NO. Issue Date Change ** 106811 09/10/01 *A 486744 See ECN *B 2894113 03/17/2010 *C 3096933 11/29/2010 Document #: 38-05025 Rev. *C Description of Change SZV Change from Spec number: 38-00032 to 38-05025 NXR ...

Page 12

... Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document #: 38-05025 Rev. *C All products and company names mentioned in this document may be the trademarks of their respective holders. cypress.com/go/plc Revised November 29, 2010 CY7C166 PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 ...

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