CY7C166-15PC Cypress Semiconductor Corp, CY7C166-15PC Datasheet

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CY7C166-15PC

Manufacturer Part Number
CY7C166-15PC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C166-15PC

Density
64Kb
Access Time (max)
15ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Address Bus
14b
Package Type
PDIP
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
115mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
22
Word Size
4b
Number Of Words
16K
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C166-15PC
Quantity:
200
Part Number:
CY7C166-15PC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Cypress Semiconductor Corporation
Document #: 38-05025 Rev. *A
Features
• High speed
• Output enable (OE) feature (CY7C166)
• CMOS for optimum speed/power
• Low active power
• Low standby power
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
• CY7C164 is available in non Pb-free 22-pin (300-Mil)
Logic Block Diagram
— 15 ns
— 633 mW
— 110 mW
Molded DIP, CY7C166 in non Pb-free 24-pin Molded SOJ
A
A
A
A
A
A
A
A
1
2
3
4
5
6
7
8
INPUT BUFFER
DECODER
COLUMN
16K x 4
ARRAY
POWER
DOWN
198 Champion Court
I/O
I/O
I/O
I/O
CE
(OE)
(7C166 ONLY)
WE
3
2
1
0
Functional Description
The CY7C164 and CY7C166 are high-performance CMOS
static RAMs organized as 16,384 by 4 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE) and
tri-state drivers. The CY7C166 has an active LOW Output
Enable (OE) feature. Both devices have an automatic power-
down feature, reducing the power consumption by 65% when
deselected.
Writing to the device is accomplished when the Chip Enable
(CE) and Write Enable (WE) inputs are both LOW (and the
Output Enable (OE) is LOW for the CY7C166). Data on the
four input/output pins (I/O
memory location specified on the address pins (A
A
Reading the device is accomplished by taking Chip Enable
(CE) LOW (and OE LOW for CY7C166), while Write Enable
(WE) remains HIGH. Under these conditions the contents of
the memory location specified on the address pins will appear
on the four data I/O pins.
The I/O pins stay in a high-impedance state when Chip Enable
(CE) is HIGH (or Output Enable (OE) is HIGH for CY7C166).
A die coat is used to insure alpha immunity.
13
).
GND
CE
A
A
A
A
A
A
A
A
A
10
11
12
13
San Jose
5
6
7
8
9
Top View
Pin Configurations
1
2
3
4
5
6
7
8
9
10
11
7C164
DIP
,
22
21
20
19
18
17
16
15
14
13
12
CA 95134-1709
16K x 4 Static RAM
V
A
A
A
A
A
I/O
I/O
I/O
I/O
WE
0
CC
4
3
2
1
0
3
2
1
0
through I/O
Revised August 3, 2006
GND
CE
OE
A
A
A
A
A
A
A
A
A
10
11
12
13
5
6
7
8
9
3
) is written into the
Top View
1
2
3
4
5
6
7
8
9
10
11
12
7C166
SOJ
CY7C164
CY7C166
408-943-2600
24
23
22
21
20
19
18
17
16
15
14
13
0
through
V
A
A
A
A
A
NC
I/O
I/O
I/O
I/O
WE
CC
4
3
2
1
0
3
2
1
0
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CY7C166-15PC Summary of contents

Page 1

... Writing to the device is accomplished when the Chip Enable (CE) and Write Enable (WE) inputs are both LOW (and the Output Enable (OE) is LOW for the CY7C166). Data on the four input/output pins (I/O memory location specified on the address pins ( ...

Page 2

... CC IH, Min. Duty Cycle = 100% Max > V – 0.3V > V – 0. < 0. Test Conditions T = 25° MHz 5.0V CC power-up, otherwise I CC CY7C164 CY7C166 CY7C164-25 CY7C166-25 25 105 20 Ambient Temperature ± 10% 0°C to +70°C –15 –25 Max. Min. Max. Unit 2.4 V 0 0.8 – ...

Page 3

... SCOPE (b) 1.73V [4] CY7C164-15 CY7C166-15 Min 7C166 7C166 3 7C166 less than t for any given device. These parameters are guaranteed by design and not 100% tested. HZCE LZCE CY7C164 CY7C166 ALL INPUT PULSES 90% 90% 10% 10% < < C164–6 CY7C164-25 CY7C166-25 Max. Min. Max. Unit ...

Page 4

... Read Cycle No ACE OE 7C166 t LZOE HIGH IMPEDANCE DATA OUT t LZCE SUPPLY CURRENT Notes HIGH for read cycle. 9. Device is continuously selected (CY7C166 10. Address valid prior to or coincident with CE transition LOW. Document #: 38-05025 Rev OHA DOE DATA VALID 50% also). IL CY7C164 CY7C166 DATA VALID C164– ...

Page 5

... SA WE DATA IN DATA I/O DATA UNDEFINED [7,11,12] Write Cycle No. 2(CE Controlled) ADDRESS DATA IN DATA I/O Notes: 11. CY7C166 only: Data I/O will be high-impedance 12 goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. Document #: 38-05025 Rev SCE PWE t SD DATA VALID ...

Page 6

... TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 30.0 25.0 20.0 15 25°C A 5.0 0.0 0 200 400 600 800 1000 CAPACITANCE (pF) CY7C164 CY7C166 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 5. 25° 0.0 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs ...

Page 7

... CY7C164 Truth Table CE WE Input/Output H X High Data Out L L Data In CY7C166 Truth Table Address Designators Address Address CY 7C164 Pin Name Function Number A10 Y5 6 A11 Y4 7 A12 Y0 8 A13 Ordering Information Speed (ns) Ordering Code 15 CY7C164-15PC CY7C166-15VC 25 CY7C164-25PC CY7C166-25VC Document #: 38-05025 Rev. *A ...

Page 8

... SOJ (51-85030) PIN 0.291[7.39] 0.330[8.38] 0.300[7.62] 0.350[8.89] 24 SEATING PLANE 0.120[3.05] 0.140[3.55] 0.004[0.10] 0.025[0.63] MIN. CY7C164 CY7C166 MAX. 0.280 0.325 0.009 3° MIN. 0.012 0.310 0.385 51-85012-*A MIN. DIMENSIONS IN INCHES[MM] MAX. REFERENCE JEDEC MO-088 PACKAGE WEIGHT 0.75gms PART # V24 ...

Page 9

... Document History Page Document Title: CY7C164/CY7C166 16K x 4 Static RAM Document Number: 38-05025 Issue Orig. of REV. ECN NO. Date Change ** 106811 09/10/01 *A 486744 See ECN Document #: 38-05025 Rev. *A Description of Change SZV Change from Spec number: 38-00032 to 38-05025 NXR Removed 20 ns and 35 ns speed bin from Product offering ...

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