LM98714BCMT National Semiconductor, LM98714BCMT Datasheet - Page 10

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LM98714BCMT

Manufacturer Part Number
LM98714BCMT
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LM98714BCMT

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PGA Specifications
ADC Specifications
Digital Offset “DAC” Specifications
Full Channel Performance Specifications
Electrical Characteristics
Symbol
The following specifications apply for VA = VD = VR = VC = 3.3V, C
Boldface limits apply for T
V
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions. Operation of the device beyond the Operating Ratings is not recommended.
Note 2: All voltages are measured with respect to AGND = DGND = 0V, unless otherwise specified.
Note 3: When the input voltage (V
The 50 mA maximum package input current rating limits the number of pins that can simultaneously safely exceed the power supplies with an input current of 25
mA to two.
V
V
V
REFT
DNL
SNR
INL
REFB
REFB
INL
REFT
-
Digital Offset DAC LSB Step Size
Differential Reference Voltage
Channel to Channel Crosstalk
Underrange Output Code
Offset Adjustment Range
Differential Non-Linearity
Overrange Output Code
Referred to AFE Output
Integral Non-Linearity
Integral Non-Linearity
Bottom of Reference
Total Output Noise
Channel Matching
Top of Reference
Gain Resolution
Maximum Gain
Minimum Gain
PGA Function
Monotonicity
Parameter
Resolution
IN
A
) at any pin exceeds the power supplies (V
= T
MIN
to T
MAX
(Continued)
; all other limits T
Min DAC Code =7b0000000
Mid DAC Code =7b1000000
Referred to AFE Output
Maximum PGA Gain
Maximum PGA Gain
Minimum PGA Gain
Minimum PGA Gain
Max DAC Code =
CDS Gain = 1x
CDS Gain = 1x
CDS Gain = 1x
CDS Gain = 1x
PGA Gain = 1x
Conditions
7b1111111
Mode 3
Mode 2
10
IN
A
<
= 25˚C.
Gain (dB) = 20LOG10(196/(280-PGA Code))
GND or V
L
Gain (V/V) = (196/(280-PGA Code))
= 10pF, and f
IN
>
V
A
or V
-0.99
7.18
17.1
0.56
1.07
Min
-3.1
-73
-5
INCLK
D
), the current at that pin should be limited to 25 mA.
Guaranteed by characterization
= 15MHz unless otherwise specified.
(Note 8)
0.8/-0.6
65535
-1024
+/-23
1008
17.9
12.7
2.07
0.89
1.18
Typ
104
7.9
0.7
-79
7.2
-74
-56
16
13
47
16
-3
8
3
0
7
0
-1.72
Max
2.65
8.77
18.9
0.82
1.29
2.55
78
30
Units
RMS
RMS
RMS
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
Bits
V/V
V/V
Bits
dB
dB
dB
dB
dB
%
V
V
V

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