LM98714BCMT National Semiconductor, LM98714BCMT Datasheet

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LM98714BCMT

Manufacturer Part Number
LM98714BCMT
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LM98714BCMT

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© 2006 National Semiconductor Corporation
LM98714
Three Channel, 16-Bit, 45 MSPS Digital Copier Analog
Front End with Integrated CCD/CIS Sensor Timing
Generator and LVDS Output
General Description
The LM98714 is a fully integrated, high performance 16-Bit,
45 MSPS signal processing solution for digital color copiers,
scanners, and other image processing applications. High-
speed signal throughput is achieved with an innovative ar-
chitecture utilizing Correlated Double Sampling (CDS), typi-
cally employed with CCD arrays, or Sample and Hold (S/H)
inputs (for Contact Image Sensors and CMOS image sen-
sors). The signal paths utilize 8 bit Programmable Gain
Amplifiers (PGA), a +/-9-Bit offset correction DAC and inde-
pendently controlled Digital Black Level correction loops for
each input. The PGA and offset DAC are programmed inde-
pendently allowing unique values of gain and offset for each
of the three inputs. The signals are then routed to a 45MHz
high performance analog-to-digital converter (ADC). The
fully differential processing channel shows exceptional noise
immunity, having a very low noise floor of -74dB. The 16-bit
ADC has excellent dynamic performance making the
LM98714 transparent in the image reproduction chain.
Applications
n Multi-Function Peripherals
n Facsimile Equipment
n Flatbed or Handheld Color Scanners
n High-speed Document Scanner
Features
n LVDS/CMOS Outputs
n LVDS/CMOS Pixel Rate Input Clock or ADC Input Clock
n CDS or S/H Processing for CCD or CIS sensors
System Block Diagram
DS201053
n Independent Gain/Offset Correction for Each Channel
n Digital Black Level Correction Loop for Each Channel
n Programmable Input Clamp Voltage
n Flexible CCD/CIS Sensor Timing Generator
Key Specifications
n Maximum Input Level
n
n ADC Resolution
n ADC Sampling Rate
n INL
n Channel Sampling Rate
n PGA Gain Steps
n PGA Gain Range
n Analog DAC Resolution
n Analog DAC Range
n Digital DAC Resolution
n Digital DAC Range
n SNR
n Power Dissipation
n Operating Temp
n Supply Voltage
3.3V Nominal (3.0V to 3.6V range)
505mW (LVDS) 610mW (CMOS)
(both with + or - polarity option)
-1024 LSB to + 1008 LSB
-74dB (
+/-300mV or +/-600mV
1.2 or 2.4 Volt Modes
15/22.5/30 MSPS
@
+/- 23 LSB (typ)
0dB PGA Gain)
October 2006
www.national.com
0.7 to 7.84x
256 Steps
20105370
45 MSPS
0 to 70˚C
+/-9 Bits
+/-6 Bits
16-Bit

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LM98714BCMT Summary of contents

Page 1

... LVDS/CMOS Pixel Rate Input Clock or ADC Input Clock n CDS or S/H Processing for CCD or CIS sensors System Block Diagram © 2006 National Semiconductor Corporation n Independent Gain/Offset Correction for Each Channel n Digital Black Level Correction Loop for Each Channel n Programmable Input Clamp Voltage ...

Page 2

LM98714 Overall Chip Block Diagram www.national.com FIGURE 1. Chip Block Diagram 2 20105301 ...

Page 3

LM98714 Pin Out Diagram FIGURE 2. LM98714 Pin Out Diagram 3 20105302 www.national.com ...

Page 4

www.national.com 4 ...

Page 5

Pin Descriptions Pin Name I/O Typ Res 1 CLK3 CLK2 CLK1 RESET SH_R SDIO I/O ...

Page 6

Pin Descriptions (Continued) Pin Name I/O Typ 36 DOUT1 TXOUT0+ 37 DOUT0 TXOUT0- 38 DGND CLKOUT CLK10 41 CLK9 CLK8 CLK7 O ...

Page 7

... Absolute Maximum Ratings 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VA,VR,VD,VC) Voltage on Any Input Pin (Not to exceed 4.2V) Voltage on Any Output Pin (execpt DVB and not to exceed 4.2V) ...

Page 8

Electrical Characteristics The following specifications apply for 3.3V, C Boldface limits apply for MIN Symbol Parameter V CMOS Clock IHC High Threshold Voltage V CMOS Clock ILC Low ...

Page 9

Electrical Characteristics The following specifications apply for 3.3V, C Boldface limits apply for MIN Symbol Parameter I Sample and Hold Mode IN_SH Input Leakage Current C Sample/Hold Mode ...

Page 10

Electrical Characteristics The following specifications apply for 3.3V, C Boldface limits apply for MIN Symbol Parameter INL Integral Non-Linearity PGA Specifications Gain Resolution Monotonicity Maximum Gain Minimum Gain ...

Page 11

Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T allowable power dissipation at any temperature is P device is operated in a severe fault condition (e.g. when input or output pins are ...

Page 12

... BANNED SUBSTANCE COMPLIANCE National Semiconductor follows the provisions of the Product Stewardship Guide for Customers (CSP-9-111C2) and Banned Substances and Materials of Interest Specification (CSP-9-111S2) for regulatory environmental compliance. Details may be found at: www.national.com/quality/green. ...

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