NCV3020BDR2G ON Semiconductor, NCV3020BDR2G Datasheet - Page 2

• Manufacturer Part Number: NCV3020BDR2G
• Description: IC PWM CTLR SYNC 8SOIC
• Manufacturer: ON Semiconductor
• Series: -r

Specifications of NCV3020BDR2G

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 670kHz
• Duty Cycle: 80%
• Voltage - Supply: 4.7 V ~ 28 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIN FUNCTION DESCRIPTION
Pin
1
2
3
4
5
6
7
8
Pin Name
COMP
HSDR
LSDR
VSW
GND
BST
V
COMP
FB
CC
VCC
FB
The V
in the high side MOSFET.
The COMP pin connects to the output of the Operational Transconductance Amplifier (OTA) and the positive
terminal of the PWM comparator. This pin is used in conjunction with the FB pin to compensate the voltage
mode control feedback loop.
The FB pin is connected to the inverting input of the OTA. This pin is used in conjunction with the COMP pin to
compensate the voltage mode control feedback loop.
Ground Pin
The LSDR pin is connected to the output of the low side driver which connects to the gate of the low side
N−FET. It is also used to set the threshold of the current limit circuit (I
to GND.
The VSW pin is the return path for the high side driver. It is also used in conjunction with the V
current in the high side MOSFET.
The HSDR pin is connected to the output of the high side driver which connects to the gate of the high side
N−FET.
The BST pin is the supply rail for the gate drivers. A capacitor must be connected between this pin and the
VSW pin.
OSCILLATOR
CC
REF
pin is the main voltage supply input. It is also used in conjunction with the VSW pin to sense current
OTA
Figure 2. NCP3020 Block Diagram
DMAX/
START
INTERNAL BIAS
SOFT
RAMP
CLK/
POR/STARTUP
THERMAL SD
http://onsemi.com
+
−
+
−
COMP
PWM
1.5 V
+
−
OOV
OUV
2
LOGIC
DRIVE
GATE
Description
LEVEL
CURRENT
SHIFT
VCC
LIMIT
VC
VC
ISET
BOOST
CLAMP
SET
BST_CHRG
SAMPLE &
) by connecting a resistor from LSDR
HOLD
BST
HSDR
VSW
LSDR
GND
CC
pin to sense