CC-9M-NA37-Z1-B Digi International, CC-9M-NA37-Z1-B Datasheet - Page 20

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CC-9M-NA37-Z1-B

Manufacturer Part Number
CC-9M-NA37-Z1-B
Description
MOD 9M 64MB SDRAM 128MB FLASH 25
Manufacturer
Digi International
Series
-r
Datasheet

Specifications of CC-9M-NA37-Z1-B

Module/board Type
Core Module
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Networking
www.digiembedded.com
Reset
Mode before wake-up
IDLE
STOP
SLEEP
A Battery Fault Signal (BATT_FLT#) is provided at the CPU to recognize the battery
state of the battery at the base board, which powers the module. Therefore this pin
is routed to the system connector. At the base board a comparator has to supervise
the battery state and the output of the comparator delivers the BATT_FLT# signal.
The figure below shows the power management state diagram:
There are 3 reset signals defined, which are routed to the system connector:
PLL on/off after wake-up
Unchanged
PLL state ahead of entering STOP
mode (PLL ON or not)
Off
To enter sleep mode by BATT_FLT, BATF_CFG bits of PWRCFG register must be
configured.
Do not exit from sleep mode when BATT_FLT is LOW; SLEEP_CFG bit of PWRCFG
register must be configured.
a reset input to the module (RSTIN#)
an output of the reset controller from the module (PWRGOOD)
a reset output from the CPU (RSTOUT#)
Wake-up source
SYSCLK after wake-up
and before the lock time
PLL output
PLL reference clock
PLL reference clock
Reset or restricted
wake-up events
Wake-up source
SYSCLK after the lock
time by internal logic
PLL output
SYSCLK ahead of entering
STOP mode (PLL output or
not)
PLL reference (input) clock
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