LM1246DKBNANOPB National Semiconductor, LM1246DKBNANOPB Datasheet - Page 30

• Manufacturer Part Number: LM1246DKBNANOPB
• Manufacturer: National Semiconductor

Specifications of LM1246DKBNANOPB

• Lead Free Status / Rohs Status: Compliant

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Register
COLWIDTH2B3
Any registers in the range of 0x8420 - 0x8426 are for National Semiconductor internal use only and should not be written to under
application conditions.
BANKSEL_0–1
BANKSEL_2–3
FADE_INTVL
Register
BGAINCTRL
GGAINCTRL
RGAINCTRL
CONTRCTRL
DAC1CTRL
DAC2CTRL
DAC3CTRL
DAC4CTRL
DACOSDDCOFF
GLOBALCTRL
AUXCTRL
PLLFREQRNG
SRTSTCTRL
Register
H_FP0
H_FP1
HF_S0
HF_S1
H_BP0
H_BP1
V_FP0
V_FP1
V_SYN_D
V_BP0
V_BP1
LM1246 Address Map
PREAMPLIFIER CONTROL
These registers, shown in Table 14. LM1246 Preamplifier Interface Registers, control the gains, DAC outputs, PLL, horizontal and
vertical blanking, OSD contrast and DC offset of the video outputs. The registers, shown in Table 15. LM1246 Preamplifier
Interface Auto Size Registers, provide measured and calculated data for the microcontroller to perform auto size and auto center
functions. Any bits marked as “X” are reserved and should be written to with zeros and should be ignored when the register is
read. Additional register detail is provided in the Control Register Definitions Section, later in this document.
TWO-COLOR ATTRIBUTE RAM
This address range (0x8440–0x8497) contains the attribute lookup tables used for displaying two-color characters. There are 16
groups of 4 bytes each according to the format shown in Table 16. LM1246 Two-Color Attribute Registers. The attributes are
stored starting with Color 0 (background) and each color is stored red first, green second and then blue. They may be written or
read using the following address format:
Address
Address
Address
0x843A
0x843E
0x858A
0x841F
0x8427
0x8428
0x8429
0x8430
0x8431
0x8432
0x8433
0x8434
0x8435
0x8436
0x8437
0x8438
0x8439
0x843F
0x8580
0x8581
0x8582
0x8583
0x8584
0x8585
0x8586
0x8587
0x8588
0x8589
Default
Default
Default
TABLE 15. LM1246 Preamplifier Interface Auto Size Registers
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0x00
0x10
0x32
0x35
0x60
0x60
0x60
0x60
0x80
0x80
0x80
0x80
0x14
0x02
0x03
0x06
0x00
0x07
0x03
0x07
0x07
0x07
TABLE 13. OSD Control Register Detail (Continued)
TABLE 14. LM1246 Preamplifier Interface Registers
(Continued)
D7
D7
D7
X
X
X
X
X
X
X
X
X
X
X
AUTO
PLL_
AID
D6
D6
D6
V_INTVL[3:0]
X
DCF[1:0]
30
B1AD[2:0]
B3AD[2:0]
CLMP
D5
D5
D5
HB_POS[3:0]
X
X
X
X
X
X
X
OSD CONT[1:0]
D4
D4
D4
X
X
HFL_HS[7:0]
VSYNC[7:0]
COL[31:24]
DAC1[7:0]
DAC2[7:0]
DAC3[7:0]
DAC4[7:0]
HBP[7:0]
HFP[7:0]
VFP[7:0]
VBP[7:0]
CONTRAST[6:0]
X
GGAIN[6:0]
RGAIN[6:0]
BGAIN[6:0]
OOR
D3
D3
D3
X
X
X
HFP[10:8]
HBPOS
BSD
_EN
VBL
H_INVTVL[3:0]
D2
D2
D2
X
DC OFFSET[2:0]
B0AD[2:0]
B2AD[2:0]
HBP[10:8]
VFP[10:8]
VBP[10:8]
RSV
PS
D1
D1
D1
X
HFL HS[9:8]
PFR[1:0]
SRST
HBD
BV
D0
D0
D0