M69000 Asiliant Technologies, M69000 Datasheet - Page 73

• Manufacturer Part Number: M69000
• Manufacturer: Asiliant Technologies

Specifications of M69000

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Chapter 7
PCI Configuration Registers
Table 7-1 PCI Configuration Registers
Note: The mechanism used to generate the PCI configuration read and configuration write cycles by which
these registers are accessed is system-dependent.
&+,36
Configuration
Space Offset
40 to 6B
6F to FF
0A
0B
0C
0D
0E
0F
1C
2C
2E
3C
3D
3E
3F
6C
6E
00
02
04
06
08
09
10
14
18
20
24
28
30
34
38
69000 Databook
SUBVENDSET
SUBDEVSET
SUBVENDID
SUBDEVID
DEVSTAT
DEVCTL
INTLINE
VENDID
MBASE
RBASE
INTPIN
DEVID
Name
BASE
PRG
REV
SUB
Function
Vendor ID Register
Device ID Register
Device Control Register
Device Status Register
Revision ID Register
Programming Interface Register
Sub-Class Code Register
Base Class Code Register
Reserved (Cache Line Size)
Reserved (Latency Timer)
Reserved (Header Type)
Reserved (Built-In-Self-Test)
Memory Base Address Register
Reserved (Base Address)
Reserved (Base Address)
Reserved (Base Address)
Reserved (Base Address)
Reserved (Base Address)
Reserved
Subsystem Vendor ID Register
Subsystem Device ID Register
ROM Base Address Register
Reserved
Reserved
Interrupt Line Register
Interrupt Pin Register
Reserved (Minimum Grant)
Reserved (Maximum Latency)
Subsystem Vendor ID Set Register
Subsystem Device ID Set Register
Subject to Change Without Notice
PCI Configuration Registers
read/clear
read/write
read/write
read/write
read/write
read/write
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
Access
Revision 1.3 8/31/98
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Bits
16
16
32
16
32
32
32
16
16
16
16
32
32
32
32
32
32
16
8
8
8
8
8
8
8
8
8
8
8
8
7-1