M69000 Asiliant Technologies, M69000 Datasheet - Page 173

• Manufacturer Part Number: M69000
• Manufacturer: Asiliant Technologies

Specifications of M69000

• Lead Free Status / Rohs Status: Supplier Unconfirmed

14-6
XR05
read-only at I/O address 3D7h with index at I/O address 3D6h set to 05h
7
6-0
XR06
read-only at I/O address 3D7h with index at I/O address 3D6h set to 06h
7-0
&+,36
Mem Space
Base Bit 23
(0)
7
7
Memory Space Base Address Bit 23
This bit is provided only for backward compatibility only. It is a hold-over from earlier CHIPS
graphics controllers.
The graphics controller requires a 16MB memory space on the host bus through which the linear
frame buffer and memory-mapped registers are accessed. This 16MB memory space always
begins on a 16MB address boundary, so bit 23 of the linear base address of this 16MB memory
space always has the value of 0. Therefore this bit always returns the value of 0 when read. This
base address is set through the MBASE register at offset 10h in the PCI configuration space.
Reserved
These bits always return the value of 0 when read.
Memory Space Base Address Bits 31-24
The graphics controller requires a 16MB memory space on the host bus through which the linear
frame buffer and memory-mapped registers are accessed. These 8 bits provide read-only access
to bits 31-24, the 8 most significant bits of the linear base address at which the 16MB memory space
begins. This base address is set through the MBASE register at offset 10h in the PCI configuration
space.
69000 Databook
Linear Base Address Low Register
Linear Base Address High Register
6
6
5
5
Memory Space Base Address Bits 31-24
Subject to Change Without Notice
Extension Registers
4
4
(xxxx:xxxx)
(000:0000)
Reserved
3
3
2
2
Revision 1.3 8/31/98
1
1
0
0