DS26514GN+ Maxim Integrated Products, DS26514GN+ Datasheet - Page 252

IC TXRX T1/E1/J1 4PORT 256-CSBGA

DS26514GN+

Manufacturer Part Number
DS26514GN+
Description
IC TXRX T1/E1/J1 4PORT 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS26514GN+

Number Of Drivers/receivers
4/4
Protocol
Ethernet
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: All latched bits in this register can create interrupts.
Bit 6: BERT Bit Error Detected (BED) Event (BBED). A latched bit, which is set when a bit error is detected. The
receive BERT must be in synchronization for it to detect bit errors.
Bit 5: Real-time BERT All Zeros or Ones (RBA01). Or’d real time status of all zero detection and all ones
detection.
Bit 4: Real-time Sync (RSYNC). Real time sync status. A zero indicates not synchronized and a one indicates
synchronization state.
Bit 3: BERT Receive All-Ones Condition (BRA1). A latched bit, which is set when 32 consecutive ones are
received.
Bit 2: BERT Receive All-Zeros Condition (BRA0). A latched bit, which is set when 32 consecutive zeros are
received.
Bit 1: BERT Receive Loss Of Synchronization Condition (BRLOS). A latched bit which is set whenever the
receive BERT begins searching for a pattern.
Bit 0: BERT in Synchronization Condition (BSYNC). A latched bit that is set when the incoming pattern matches
for 32 consecutive bit positions.
Rev: 101608
7
0
BSR
BERT Status Register
110Eh + (10h x (n - 1)) : where n = 1 to 4
BBED
6
0
RBRA01
5
0
RSYNC
4
0
BRA1
3
0
DS26514 4-Port T1/E1/J1 Transceiver
BRA0
2
0
BRLOS
1
0
252 of 305
BSYNC
0
0

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