DS26514GN+ Maxim Integrated Products, DS26514GN+ Datasheet - Page 129

IC TXRX T1/E1/J1 4PORT 256-CSBGA

DS26514GN+

Manufacturer Part Number
DS26514GN+
Description
IC TXRX T1/E1/J1 4PORT 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS26514GN+

Number Of Drivers/receivers
4/4
Protocol
Ethernet
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Register Name:
Description:
Register Address:
Bit #
Name
Default
Bits 7 and 6: Interleave Bus Operation Mode Select 1 and 0 (IBOMS[1:0]). These bits determine the
configuration of the IBO (interleaved bus) multiplexer and inform the framers of the IBO configuration. These bits
should be used in conjunction with the Rx and Tx IBO control registers within each of the framer units. These bits
control Channels 1 to 4. Additional information concerning the IBO multiplexer is given in Section 9.8.2. These bits
must be set whether using the internal IBO mux or externally ganging the pins.
**The DS26514 is limited to slots 1-4 in this mode. The DS26514 cannot be assigned to slots 5-8.
Bits 5 and 4: Backplane Clock Select 1 and 0 (BPCLK[1:0]). These bits determine the clock frequency output on
the BPCLK1 pin.
Bit 2: Receive Frame/Multiframe Sync Select (RFMSS). This bit controls the function of all four
RMSYNCn/RFSYNCn pins.
Bit 1: Transmit Channel Block/Clock Select (TCBCS). This bit controls the function of all four
TCHBLKn/TCHCLKn pins.
Bit 0: Receive Channel Block/Clock Select (RCBCS). This bit controls the function of all four
RCHBLKn/RCHCLKn pins.
Rev: 101608
BPCLK1
IBOMS1
0
0
1
1
0
0
1
1
0 = RMSYNC/RFSYNC[4:1] pins output RFSYNC[4:1] (Receive Frame Sync)
1 = RMSYNC/RFSYNC[4:1] pins output RMSYNC[4:1] (Receive Multiframe Sync)
0 = TCHBLK/TCHCLK[4:1] pins output TCHBLK[4:1] (Transmit Channel Block)
1 = TCHBLK/TCHCLK[4:1] pins output TCHCLK[4:1] (Transmit Channel Clock)
0 = RCHBLK/RCHCLK[4:1] pins output RCHBLK[4:1] (Receive Channel Block)
1 = RCHBLK/RCHCLK[4:1] pins output RCHCLK[4:1] (Receive Channel Clock)
IBOMS1
7
0
BPCLK0
IBOMS0
0
1
0
1
0
1
0
1
IBOMS0
GFCR1
Global Framer Control Register 1
00F1h
6
0
IBO disabled.
2 devices on bus (4.096MHz).
4 devices on bus (8.192MHz).
8 devices on bus (16.384MHz).**
BPCLK1 Frequency
BPCLK1
16.384MHz
5
0
IBO Mode
2.048MHz
4.096MHz
8.192MHz
BPCLK0
4
0
3
0
DS26514 4-Port T1/E1/J1 Transceiver
RFMSS
2
0
TCBCS
1
0
129 of 305
RCBCS
0
0

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