MT48LC32M16A2TG-7E Micron Technology Inc, MT48LC32M16A2TG-7E Datasheet - Page 64

• Manufacturer Part Number: MT48LC32M16A2TG-7E
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC32M16A2TG-7E

• Organization: 32Mx16
• Density: 512Mb
• Address Bus: 15b
• Access Time (max): 5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 125mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant

Figure 48:
PDF: 09005aef809bf8f3/Source: 09005aef80818a4a
512MbSDRAM.fm - Rev. L 10/07 EN
DQML, DQMH
COMMAND
A11, A12
BA0, BA1
A0–A9,
DQM/
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
BANK
T0
ROW
ROW
Single WRITE with Auto Precharge
t CMH
t CKH
t AH
t AH
t AH
Notes:
t RCD 3
t RAS
t RC
t CK
T1
NOP 4
1. For this example, BL = 1, and the WRITE burst is followed by a “manual” PRECHARGE.
2. 14ns to 15ns is required between <D
3. x16: A11 and A12 = “Don’t Care”; x8: A12 = “Don’t Care.”
4. WRITE command not allowed else
quency.
t CL
NOP 4
T2
t CH
NOP 4
T3
ENABLE AUTO PRECHARGE
t CMS
t DS
COLUMN m
BANK
WRITE
T4
D
IN
t CMH
t DH
m
64
3
t WR
2
t
RAS would be violated.
IN
T5
NOP
m> and the PRECHARGE command, regardless of fre-
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T6
NOP
t RP
512Mb: x4, x8, x16 SDRAM
T7
NOP
©2000 Micron Technology, Inc. All rights reserved.
Timing Diagrams
ACTIVE
ROW
ROW
BANK
T8
T9
NOP
Don’t Care
Undefined