MT48LC32M16A2TG-7E Micron Technology Inc, MT48LC32M16A2TG-7E Datasheet - Page 61

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MT48LC32M16A2TG-7E

Manufacturer Part Number
MT48LC32M16A2TG-7E
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC32M16A2TG-7E

Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
125mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
Figure 45:
PDF: 09005aef809bf8f3/Source: 09005aef80818a4a
512MbSDRAM.fm - Rev. L 10/07 EN
DQML, DQMU
COMMAND
BA0, BA1
A11, A12
A0–A9,
DQM/
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
ROW
ROW
BANK
WRITE – Without Auto Precharge
t CKH
t CMH
t AH
t AH
t AH
Notes:
t RCD
t RAS
t RC
t CK
T1
NOP
1. For this example, BL = 4, and the WRITE burst is followed by a “manual” PRECHARGE.
2. 14ns to 15ns is required between <D
3. x16: A11 and A12 = “Don’t Care”; x8: A12 = “Don’t Care.”
DISABLE AUTO PRECHARGE
quency.
t CMS
t CL
t DS
COLUMN m 2
WRITE
BANK
T2
D
IN
t CMH
t CH
t DH
m
t DS
D
IN
T3
NOP
m + 1
t DH
t DS
D
IN
T4
NOP
m + 2
t DH
61
t DS
D
IN
IN
T5
NOP
m + 3
m> and the PRECHARGE command, regardless of fre-
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t DH
t
WR
T6
NOP
3
512Mb: x4, x8, x16 SDRAM
PRECHARGE
SINGLE BANK
ALL BANKs
T7
BANK
©2000 Micron Technology, Inc. All rights reserved.
Timing Diagrams
t RP
NOP
T8
ACTIVE
ROW
ROW
BANK
T9
Don’t Care

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