ENC28J60-I/SO Microchip Technology, ENC28J60-I/SO Datasheet - Page 6

IC ETHERNET CTRLR W/SPI 28SOIC

ENC28J60-I/SO

Manufacturer Part Number
ENC28J60-I/SO
Description
IC ETHERNET CTRLR W/SPI 28SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of ENC28J60-I/SO

Package / Case
28-SOIC (7.5mm Width)
Controller Type
Ethernet Controller, MAC/10Base-T
Interface
SPI
Voltage - Supply
3.1 V ~ 3.6 V
Current - Supply
160mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Input Voltage Range (max)
5.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.1 V to 3.6 V
Supply Current (max)
180 mA
Data Rate
10Mbps
No. Of Ports
1
Ethernet Type
IEEE 802.3
Interface Type
SPI
Supply Current
180mA
Supply Voltage Range
3.1V To 3.6V
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Peak Reflow Compatible (260 C)
No
Leaded Process Compatible
No
Product
Ethernet Controllers
Standard Supported
IEEE 802.3
Ethernet Connection Type
10Base-T
Digital Ic Case Style
SOIC
No. Of Pins
28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM163024 - BOARD DEMO PICDEM.NET 2AC164123 - BOARD DAUGHTER ETH PICTAIL PLUSAC164121 - BOARD DAUGHTER PICTAIL ETHERNET
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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ENC28J60
FIGURE 1-2:
TABLE 1-1:
DS39662C-page 4
Pin Name
Legend:
Note 1:
CLKOUT
TPOUT+
TPOUT-
V
RESET
V
V
V
RBIAS
V
V
TPIN+
V
V
TPIN-
OSC1
OSC2
LEDB
LEDA
V
SSOSC
DDOSC
SCK
DDPLL
V
SSPLL
V
INT
DDRX
NC
SO
CS
SSRX
DDTX
SSTX
CAP
SI
DD
SS
2:
3:
4:
5:
SOIC, SSOP
I = Input, O = Output, P = Power, ANA = Analog Signal Input, ST = Schmitt Trigger
Pins have a maximum current capacity of 8 mA.
Pins have a maximum current capacity of 4 mA.
Pins are 5V tolerant.
Pins have an internal weak pull-up to V
Pins have a maximum current capacity of 12 mA.
SPDIP,
Pin Number
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
11
1
2
3
4
5
6
7
8
9
MCU
PINOUT I/O DESCRIPTIONS
SDO
INT
SCK
TYPICAL ENC28J60-BASED INTERFACE
SDI
I/O
X
QFN
19
25
26
27
28
10
11
12
13
14
15
16
17
18
20
21
22
23
24
1
2
3
4
5
6
7
8
9
Type
SCK
Pin
INT
O
O
O
O
O
O
O
O
O
P
P
P
P
P
P
P
P
P
P
P
SO
CS
I
I
I
I
I
I
I
I
SI
Buffer
Type
ANA
ANA
ANA
ANA
ST
ST
ST
ST
TX/RX
Buffer
DD
2.5V output from internal regulator. A low Equivalent Series Resistance (ESR)
capacitor, with a typical value of 10 mF and a minimum value of 1 mF to
ground, must be placed on this pin.
Ground reference.
Programmable clock output pin.
INT interrupt output pin.
Reserved function; always leave unconnected.
Data out pin for SPI interface.
Data in pin for SPI interface.
Clock in pin for SPI interface.
Chip select input pin for SPI interface.
Active-low device Reset input.
Ground reference for PHY RX.
Differential signal input.
Differential signal input.
Bias current pin for PHY. Must be tied to ground via a resistor (refer to
Section 2.4 “Magnetics, Termination and Other External Components”
for details).
Positive supply for PHY TX.
Differential signal output.
Differential signal output.
Ground reference for PHY TX.
Positive 3.3V supply for PHY RX.
Positive 3.3V supply for PHY PLL.
Ground reference for PHY PLL.
Ground reference for oscillator.
Oscillator input.
Oscillator output.
Positive 3.3V supply for oscillator.
LEDB driver pin.
LEDA driver pin.
Positive 3.3V supply.
.
Preliminary
ENC28J60
MAC
(5)
(5)
(2)
PHY
(3)
(3)
(2)
(3,4)
(1)
Description
TPOUT+/-
TPIN+/-
LEDA
LEDB
(3,4)
TRANSFORMER
© 2008 Microchip Technology Inc.
ETHERNET
RJ45

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