ENC28J60-I/SO Microchip Technology, ENC28J60-I/SO Datasheet - Page 54

IC ETHERNET CTRLR W/SPI 28SOIC

ENC28J60-I/SO

Manufacturer Part Number
ENC28J60-I/SO
Description
IC ETHERNET CTRLR W/SPI 28SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of ENC28J60-I/SO

Package / Case
28-SOIC (7.5mm Width)
Controller Type
Ethernet Controller, MAC/10Base-T
Interface
SPI
Voltage - Supply
3.1 V ~ 3.6 V
Current - Supply
160mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Input Voltage Range (max)
5.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.1 V to 3.6 V
Supply Current (max)
180 mA
Data Rate
10Mbps
No. Of Ports
1
Ethernet Type
IEEE 802.3
Interface Type
SPI
Supply Current
180mA
Supply Voltage Range
3.1V To 3.6V
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Peak Reflow Compatible (260 C)
No
Leaded Process Compatible
No
Product
Ethernet Controllers
Standard Supported
IEEE 802.3
Ethernet Connection Type
10Base-T
Digital Ic Case Style
SOIC
No. Of Pins
28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM163024 - BOARD DEMO PICDEM.NET 2AC164123 - BOARD DAUGHTER ETH PICTAIL PLUSAC164121 - BOARD DAUGHTER PICTAIL ETHERNET
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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ENC28J60
8.3
The Magic Packet filter checks the destination address
and data fields of all incoming packets. If the destination
address matches the MAADR registers and the data
field holds a valid Magic Packet pattern someplace
FIGURE 8-4:
8.4
The Hash Table receive filter performs a CRC over the
six destination address bytes in the packet. The CRC is
then used as a pointer into the bits of the EHT registers.
If the pointer points to a bit which is set, the packet
meets the Hash Table filter criteria. For example, if the
CRC is calculated to be 0x5, bit 5 in the Hash Table will
be checked. If it is set, the Hash Table filter criteria will
be met. If every bit is clear in the Hash Table, the filter
criteria will never be met. Similarly, if every bit is set in
the Hash Table, the filter criteria will always be met.
DS39662C-page 52
Magic Packet™ Filter
Hash Table Filter
SAMPLE MAGIC PACKET™ FORMAT
11 22 33 44 55 66
77 88 99 AA BB CC
00 FE
09 0A 0B 0C 0D 0E
FF FF FF FF FF 00
FF FF FF FF FF FF
11 22 33 44 55 66
11 22 33 44 55 66
11 22 33 44 55 66
11 22 33 44 55 66
11 22 33 44 55 66
11 22 33 44 55 66
11 22 33 44 55 66
11 22 33 44 55 66
11 22 33 44 55 66
11 22 33 44 55 66
11 22 33 44 55 66
11 22 33 44 55 66
11 22 33 44 55 66
11 22 33 44 55 66
11 22 33 44 55 66
11 22 33 44 55 66
19 1A 1B 1C 1D 1E
EF 54 32 10
Received
Data
Preliminary
Type/Length
Field
Data
FCS
DA
SA
pattern of six 0xFF bytes, followed by 16 repeats of the
within it, then the packet will meet the Magic Packet filter
criteria. The Magic Packet pattern consists of a sync
destination address. See Figure 8-4 for a sample Magic
Packet.
8.5
The Multicast receive filter checks the destination
address of all incoming packets. If the Least Significant
bit of the first byte of the destination address is set, the
packet will meet the Multicast filter criteria.
8.6
The Broadcast receive filter checks the destination
address of all incoming packets. If the destination
address is FF-FF-FF-FF-FF-FF, the packet will meet
the Broadcast filter criteria.
Multicast Filter
Broadcast Filter
Sync Pattern
Sixteen Repeats of
the Station Address
Comments
© 2008 Microchip Technology Inc.

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