ENC28J60-I/SO Microchip Technology, ENC28J60-I/SO Datasheet - Page 49

IC ETHERNET CTRLR W/SPI 28SOIC

ENC28J60-I/SO

Manufacturer Part Number
ENC28J60-I/SO
Description
IC ETHERNET CTRLR W/SPI 28SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of ENC28J60-I/SO

Package / Case
28-SOIC (7.5mm Width)
Controller Type
Ethernet Controller, MAC/10Base-T
Interface
SPI
Voltage - Supply
3.1 V ~ 3.6 V
Current - Supply
160mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Input Voltage Range (max)
5.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.1 V to 3.6 V
Supply Current (max)
180 mA
Data Rate
10Mbps
No. Of Ports
1
Ethernet Type
IEEE 802.3
Interface Type
SPI
Supply Current
180mA
Supply Voltage Range
3.1V To 3.6V
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Peak Reflow Compatible (260 C)
No
Leaded Process Compatible
No
Product
Ethernet Controllers
Standard Supported
IEEE 802.3
Ethernet Connection Type
10Base-T
Digital Ic Case Style
SOIC
No. Of Pins
28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM163024 - BOARD DEMO PICDEM.NET 2AC164123 - BOARD DAUGHTER ETH PICTAIL PLUSAC164121 - BOARD DAUGHTER PICTAIL ETHERNET
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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8.0
To minimize the processing requirements of the host
controller, the ENC28J60 incorporates several different
receive filters which can automatically reject packets
which are not needed. Six different types of packet
filters are implemented:
• Unicast
• Pattern Match
• Magic Packet™
• Hash Table
• Multicast
• Broadcast
© 2008 Microchip Technology Inc.
RECEIVE FILTERS
Preliminary
The individual filters are all configured by the ERXFCON
register (Register 8-1). More than one filter can be active
at any given time. Additionally, the filters can be config-
ured by the ANDOR bit to either logically AND, or
logically OR, the tests of several filters. In other words,
the filters may be set so that only packets accepted by
all active filters are accepted, or a packet accepted by
any one filter is accepted. The flowcharts in Figure 8-1
and Figure 8-2 show the effect that each of the filters will
have depending on the setting of ANDOR.
The device can enter Promiscuous mode and receive
all packets by clearing the ERXFCON register. The
proper setting of the register will depend on the
application requirements.
ENC28J60
DS39662C-page 47

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