CS4202-JQZ Cirrus Logic Inc, CS4202-JQZ Datasheet - Page 52

• Manufacturer Part Number: CS4202-JQZ
• Description: IC AC 97 W/HEADPHONE AMP 48TQFP
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codec '97r

Specifications of CS4202-JQZ

• Package / Case: 48-LQFP
• Data Interface: Serial
• Resolution (bits): 18, 20 b
• Number Of Adcs / Dacs: 1 / 1
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 90 / 90
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 8
• Number Of Dac Outputs: 3
• Conversion Rate: 48 KSPS
• Interface Type: Serial (5-Wire, I2S)
• Resolution: 18 bit, 20 bit
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Number Of Channels: 1 ADC/1 DAC
• Supply Current: 10 mA
• Thd Plus Noise: - 84 dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1181

the part behaves as specified in AC ’97. As shown in
Figure 24, if the HPCFG pin is grounded, the part be-
haves as if HP_OUT was the only output. In this
case, LINE_OUT will be muted, the Master Volume
Register (Index 02h) will control HP_OUT and
PC_BEEP will be routed to HP_OUT during RE-
SET.
52
Figure 23. Line Out and Headphone Out Setup
LINE_OUT_R
LINE_OUT_R
LINE_OUT_L
LINE_OUT_L
HP_OUT_R
HP_OUT_C
HP_OUT_R
HP_OUT_C
HP_OUT_L
HP_OUT_L
Figure 24. Line Out/Headphone Out Setup
HPCFG
HPCFG
1000 pF
AGND
AGND
+
+
+
+
+
+
220 µ F
220 µ F
220 µ F
220 µ F
ELEC
ELEC
ELEC
ELEC
ELEC
ELEC
1 µF
1 µ F
1000 pF
+
+
220 k Ω
10 k Ω
10 µ F
ELEC
10 µ F
ELEC
10 k Ω
AGND
220 k Ω
10 k Ω
AGND
AGND
10 k Ω
AGND
AGND
AGND
Line Out/
Headphone
Jack
Line Out
Jack
Headphone
Jack
10.2.2 Mono Output
The mono output, MONO_OUT, can be either a sum
of the left and right output channels, attenuated by
6 dB to prevent clipping at full scale, or the selected
Mic signal. The mono out channel can drive the PC
internal mono speaker using an appropriate buffer
circuit.
10.3 Miscellaneous Analog Signals
The AFLT1 and AFLT2 pins must have a 1000 pF
NPO capacitor to analog ground. These capacitors
provide a single-pole low-pass filter at the inputs to
the ADCs. This makes low-pass filters at each analog
input pin unnecessary.
The REFFLT pin must have a short, wide trace to a
2.2 µF and a 0.1 µF capacitor connected to analog
ground (see Figure 26 in Section 11, Grounding and
Layout, for an example). The 2.2 µF capacitor must
not be replaced by any other value (it may be re-
placed with two 1 µF capacitors in parallel) and must
be ceramic with low leakage current. Electrolytic ca-
pacitors should not be used. No other connection
should be made, as any coupling onto this pin will
degrade the analog performance of the CS4202.
Likewise, digital signals should be kept away from
REFFLT for similar reasons.
10.4 Power Supplies
The power supplies providing analog power should
be as clean as possible to minimize coupling into the
analog section which could degrade analog perfor-
mance. The +5 V analog supply should be generated
from a voltage regulator (7805 type) connected to a
+12 V supply. This helps isolate the analog circuitry
from noise typically found on +5 V digital supplies.
A typical voltage regulator circuit for analog power
using an MC78M05CDT is shown in Figure 25. One
analog power pin, AVdd2, supplies power to the
headphone amplifier on the CS4202. The other ana-
log power pin, AVdd1, supplies power to the rest of
the CS4202 analog circuitry. The digital power pins,
DVdd1 and DVdd2, should be connected to the same
CS4202
DS549PP2