MPC5200BV400 Freescale Semiconductor, MPC5200BV400 Datasheet - Page 15

• Manufacturer Part Number: MPC5200BV400
• Description: IC MPU 32BIT 400MHZ 272-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC5200BV400

• Processor Type: MPC52xx PowerPC 32-Bit
• Speed: 400MHz
• Voltage: 1.5V
• Mounting Type: Surface Mount
• Package / Case: 272-PBGA
• Family Name: MPC52xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 400MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.58V
• Operating Supply Voltage (min): 1.42V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

For additional information, see the MPC5200B User’s Manual (MPC5200BUM).
1.3.4.1
During reset (HRESET and PORRESET) the Reset Configuration Word is latched in the related Reset Configuration Word
Register with each rising edge of the SYS_XTAL signal. If both resets (HRESET and PORRESET) are inactive (high), the
contents of this register are locked immediately with the SYS_XTAL clock (see
1.3.5
The MPC5200B provides three different kinds of external interrupts:
The propagation of these three kinds of interrupts to the core is shown in the following graphic:
Freescale Semiconductor
•
•
•
Four IRQ interrupts
Eight GPIO interrupts with simple interrupt capability (not available in power-down mode)
Eight WakeUp interrupts (special GPIO pins)
RST_CFG_WRD
External Interrupts
Reset Configuration Word
PORRESET
Beware of changing the values on the pins of the reset configuration word after the
deassertion of PORRESET. This may cause problems because it may change the internal
clock ratios and so extend the PLL locking process.
SYS_XTAL
HRESET
sample
sample
Figure 3. Reset Configuration Word Locking
sample
sample
MPC5200B Data Sheet, Rev. 4
sample sample
sample
NOTE
sample
4096 clocks
sample
Figure
sample
3).
LOCK
15