XC5210-6PQ160C Xilinx Inc, XC5210-6PQ160C Datasheet - Page 49

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XC5210-6PQ160C

Manufacturer Part Number
XC5210-6PQ160C
Description
IC FPGA 324 CLB'S 160-PQFP
Manufacturer
Xilinx Inc
Series
XC5200r
Datasheet

Specifications of XC5210-6PQ160C

Number Of Logic Elements/cells
1296
Number Of Labs/clbs
324
Number Of I /o
133
Number Of Gates
16000
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
160-BQFP
Dc
0037
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Total Ram Bits
-
Other names
122-1147

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XC5200 IOB Switching Characteristic Guidelines
Testing of the switching parameters is modeled after testing methods specified by MIL-M-38510/605. All devices are 100%
functionally tested. Since many internal timing parameters cannot be measured directly, they are derived from benchmark
timing patterns. The following guidelines reflect worst-case values over the recommended operating conditions. For more
detailed, more precise, and more up-to-date timing information, use the values provided by the timing calculator and used
in the simulator.
November 5, 1998 (Version 5.2)
Input
Propagation Delays from CMOS or TTL Levels
Output
Propagation Delays to CMOS or TTL Levels
Note:
Pad to I (no delay)
Pad to I (with delay)
Output (O) to Pad (fast)
Output (O) to Pad (slew-limited)
From clock (CK) to output pad (fast), using direct connect between Q
and output (O)
From clock (CK) to output pad (slew-limited), using direct connect be-
tween Q and output (O)
3-state to Pad active (fast)
3-state to Pad active (slew-limited)
Internal GTS to Pad active
1. Timing is measured at pin threshold, with 50-pF external capacitance loads. Slew-limited output rise/fall times are
2. Unused and unbonded IOBs are configured by default as inputs with internal pull-up resistors.
3. Timing is based upon the XC5215 device. For other devices, see Timing Calculator.
approximately two times longer than fast output rise/fall times.
R
Product Obsolete or Under Obsolescence
Description
XC5200 Series Field Programmable Gate Arrays
Speed Grade
Symbol
T
T
T
T
T
T
T
T
OKPOF
OKPOS
TSONF
TSONS
T
OPS
OPF
GTS
PID
PI
Max
11.4
10.1
14.9
10.4
17.7
(ns)
5.7
4.6
9.5
5.6
-6
Max
10.2
13.1
15.9
(ns)
5.0
4.5
8.4
9.3
5.2
9.0
-5
Max
10.2
11.8
14.7
(ns)
4.8
4.5
8.0
8.3
4.9
8.3
-4
Max
(ns)
10.0
13.5
3.3
9.5
3.5
5.0
7.5
4.6
6.0
-3
7-131
7

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