EP2C20F484C8 Altera, EP2C20F484C8 Datasheet - Page 23

IC CYCLONE II FPGA 20K 484-FBGA

EP2C20F484C8

Manufacturer Part Number
EP2C20F484C8
Description
IC CYCLONE II FPGA 20K 484-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet

Specifications of EP2C20F484C8

Number Of Logic Elements/cells
18752
Number Of Labs/clbs
1172
Total Ram Bits
239616
Number Of I /o
315
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Cyclone® II
Number Of Logic Blocks/elements
18752
# I/os (max)
315
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
18752
Ram Bits
239616
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
For Use With
P0528 - BOARD DEV DE1 ALTERA544-1736 - CYCLONE II STARTER KIT EP2C20N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1365
EP2C20F484C8

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0
Figure 2–8. R4 Interconnect Connections
Notes to
(1)
(2)
Altera Corporation
February 2007
C4 interconnects can drive R4 interconnects.
This pattern is repeated for every LAB in the LAB row.
Figure
2–8:
R4 Interconnect
Driving Left
The direct link interconnect allows an LAB, M4K memory block, or
embedded multiplier block to drive into the local interconnect of its left
and right neighbors. Only one side of a PLL block interfaces with direct
link and row interconnects. The direct link interconnect provides fast
communication between adjacent LABs and/or blocks without using
row interconnect resources.
The R4 interconnects span four LABs, three LABs and one M4K memory
block, or three LABs and one embedded multiplier to the right or left of a
source LAB. These resources are used for fast row connections in a four-
LAB region. Every LAB has its own set of R4 interconnects to drive either
left or right.
R4 interconnects can drive and be driven by LABs, M4K memory blocks,
embedded multipliers, PLLs, and row IOEs. For LAB interfacing, a
primary LAB or LAB neighbor (see
interconnect. For R4 interconnects that drive to the right, the primary
LAB and right neighbor can drive on to the interconnect. For R4
interconnects that drive to the left, the primary LAB and its left neighbor
can drive on to the interconnect. R4 interconnects can drive other R4
interconnects to extend the range of LABs they can drive. Additionally,
R4 interconnects can drive R24 interconnects, C4, and C16 interconnects
for connections from one row to another.
Adjacent LAB can
Drive onto Another
LAB's R4 Interconnect
Neighbor
LAB
Figure 2–8
Primary
LAB (2)
shows R4 interconnect connections from an LAB.
C4 Column Interconnects (1)
Neighbor
LAB
Cyclone II Device Handbook, Volume 1
Figure
2–8) can drive a given R4
R4 Interconnect
Driving Right
Cyclone II Architecture
2–11

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