Z8927320VSG Zilog, Z8927320VSG Datasheet - Page 36

• Manufacturer Part Number: Z8927320VSG
• Description: DSP 20MHZ 16-BIT W/ A/D 44-PLCC
• Manufacturer: Zilog
• Series: Z892x3r
• Type: Fixed Pointr

Specifications of Z8927320VSG

• Interface: SPI, 3-Wire Serial
• Clock Rate: 20MHz
• Non-volatile Memory: OTP (16 kB)
• On-chip Ram: 1kB
• Voltage - I/o: 5.00V
• Voltage - Core: 5.00V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-LCC (J-Lead)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

I/O PORTS (Continued)
Z89223/273/323/373
16-Bit Digital Signal Processors with A/D Converter
Port2Ñ8-Bit Programmable I/O
Bank15/EXT2 is the Port2 control register. The LSB is the
Port2 direction control. Port2 data is accessed as the MSB
of EXT5 in Banks 0,1,or 5. The Port2 pins can also be
36
Port Pin
P2.0/INT0
P2.1/INT1
P2.2/TMO0
P2.3/TMO1
P2.4/WAIT
P2.5/UI2
P2.6/TMO2
P2.7
Bank 15/EXT2
D15 D14 D13 D12 D11 D10 D9 D8
IF
Bank15/EXT2 Bit 9 = 1
Bank15/EXT1 Bit 4 = 1
Bank13/EXT1 Bit [6,5] = 10, or
Bank14/EXT1 Bit [6,5] = 10
Bank13/EXT1 Bit [6,5] = 11, or
Bank14/EXT1 Bit [6,5] = 11
Bank15/EXT3 Bit 14 = 1
Bank15/EXT2 Bit 13 = 1
Bank15/EXT2 Bits 14 = 1
Table 17. Port2 Bit Function Allocation
D7 D6 D5 D4 D3 D2 D1 D0
Figure 27. Bank15/EXT2 Register
mapped to internal functions. When INT0, INT1, TMO0,
TMO1, WAIT, UI2, or TMO2 are enabled, they use Port2
pins. The 44-pin packages do not feature Port2 pins
P2.7–P2.5.
Condition
Enable INT0
Enable INT1
Enable TMO0
Enable TMO1
Enable WAIT
C/T2 clock is UI2
Enable TMO2
Port2 I/O Directions
Port3
INT0
Port2 Outputs
Counter/Timer2
Counter/Timer2 Operation
If D15 = 0, Counter/Timer2 Clock defined by
If D15 = 1, Counter/Timer2 Sleep Mode Wake-Up
TMO2
Counter/Timer2 Clock
0 = Input (default)
1 = Output
0 = Disabled (default)
1 = Enabled
0 = Disabled (default)
1 = Enabled
0 = Push-Pull (default)
1 = Open-Drain
0 = Disabled (default)
1 = Enabled
0 = Stopped (default)
1 = Counting
0 = System Clock/2 (default)
1 = UI2
0 = Disabled (default)
1 = Enabled
0 = Disabled (default)
1 = Enabled
0 = Defined by D13 (default)
1 = CLKI
Then
INT0
INT1
TMO0
TMO1
WAIT
UI2
TMO2
P2.7
DS000202-DSP0599
Else
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
ZiLOG