ADSP-21262SKBCZ200 Analog Devices Inc, ADSP-21262SKBCZ200 Datasheet - Page 21

• Manufacturer Part Number: ADSP-21262SKBCZ200
• Description: IC DSP CTLR 32BIT 136CSPBGA
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Fixed/Floating Pointr

Specifications of ADSP-21262SKBCZ200

• Interface: DAI, SPI
• Clock Rate: 200MHz
• Non-volatile Memory: ROM (512 kB)
• On-chip Ram: 256kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.20V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 136-CSPBGA
• No. Of Bits: 32 Bit
• Frequency: 200MHz
• Supply Voltage: 1.2V
• Embedded Interface Type: SPI
• No. Of I/o's: 23
• Supply Voltage Range: 1.14V To 1.26V, 3.13V To 3.47V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADSP21262SKBCZ200

Timer PWM_OUT Cycle Timing
The timing specification in
Timer PWM_OUT (pulse-width modulation) mode. Timer sig-
nals are routed to the DAI_P20–1 pins through the SRU.
Therefore, the timing specifications provided below are valid at
the DAI_P20–1 pins.
Table 14. Timer PWM_OUT Timing
Timer WDTH_CAP Timing
The timing specification in
Timer WDTH_CAP (pulse width count and capture) mode.
Timer signals are routed to the DAI_P20–1 pins through the
SRU. Therefore, the timing specifications provided below are
valid at the DAI_P20–1 pins.
Table 15. Timer Width Capture Timing
Parameter
Switching Characteristic
t
Parameter
Timing Requirement
t
PWMO
PWI
DAI_P20–1
DAI_P20–1
(TIMER)
(TIMER)
Timer Pulse Width Output
Timer Pulse Width
Table 14
Table 15
and
and
Figure 12
Figure 13
Figure 13. Timer Width Capture Timing
Rev. B | Page 21 of 48 | August 2005
applies to
applies to
Figure 12. Timer PWM_OUT Timing
Min
2 t
Min
2 t
CCLK
CCLK
t
PWMO
– 1
t
PWI
Max
2(2
Max
2(2
31
31
– 1) t
– 1) t
CCLK
CCLK
ADSP-21262
Unit
ns
Unit
ns