ST72F324BK6TAS STMicroelectronics, ST72F324BK6TAS Datasheet - Page 170

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ST72F324BK6TAS

Manufacturer Part Number
ST72F324BK6TAS
Description
8-BIT MCU
Manufacturer
STMicroelectronics
Datasheet
Electrical characteristics
170/198
Figure 79. SPI slave timing diagram with CPHA = 0
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
Figure 80. SPI slave timing diagram with CPHA = 1
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration.
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration.
MISO
MOSI
SS
MISO
MOSI
INPUT
SS
CPHA=1
CPOL=0
CPHA=1
CPOL=1
CPHA=0
CPOL=1
CPHA=0
CPOL=0
OUTPUT
INPUT
OUTPUT
INPUT
INPUT
t
a(SO)
see
note 2
See note 2
t
t
su(SS)
t
a(SO)
su(SS)
t
HZ
su(SI)
t
t
w(SCKH)
w(SCKL)
t
su(SI)
t
t
w(SCKH)
w(SCKL)
Doc ID13466 Rev 4
MSB OUT
MSB IN
MSB IN
t
MSB OUT
c(SCK)
t
h(SI)
t
h(SI)
t
v(SO)
t
c(SCK)
t
v(SO)
Bit 6 OUT
DD
DD
Bit 6 OUT
and 0.7xV
and 0.7xV
Bit 1 IN
t
h(SO)
(1)
(1)
Bit 1 IN
DD
DD
t
h(SO)
.
.
t
t
f(SCK)
r(SCK)
t
t
f(SCK)
r(SCK)
LSB IN
LSB OUT
LSB IN
LSB OUT
t
h(SS)
t
h(SS)
ST72324B-Auto
t
dis(SO)
t
dis(SO)
note 2
See
see
note 2

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