ST72F324BK6TAS STMicroelectronics, ST72F324BK6TAS Datasheet - Page 166

• Manufacturer Part Number: ST72F324BK6TAS
• Description: 8-BIT MCU
• Manufacturer: STMicroelectronics

Electrical characteristics
12.10
12.10.1
Table 107. Asynchronous RESET pin
1. Data based on characterization results, not tested in production.
2. Hysteresis voltage between Schmitt trigger switching levels.
3. The I
4. Data guaranteed by design, not tested in production.
5. To guarantee the reset of the device, a minimum pulse has to be applied to the RESET pin. All short pulses applied on the
6. The reset network (the resistor and two capacitors) protects the device against parasitic resets, especially in noisy
166/198
t
w(RSTL)out
t
t
Symbol
h(RSTL)in
g(RSTL)in
ports and control pins) must not exceed I
RESET pin with a duration below t
environments.
V
R
V
V
V
I
hys
IO
ON
OL
IH
IL
IO
current sunk must always respect the absolute maximum rating specified in
Input low level voltage
Input high level voltage
Schmitt trigger voltage hysteresis
Output low level voltage
Driving current on RESET pin
Weak pull-up equivalent resistor
Generated reset pulse duration
External reset pulse hold time
Filtered glitch duration
Control pin characteristics
Asynchronous RESET pin
Subject to general operating conditions for V
Parameter
h(RSTL)in
(1)
(6)
(1)
(3)
VSS
can be ignored.
(5)
.
(2)
Doc ID13466 Rev 4
V
V
Internal reset sources
DD
DD
= 5V, I
= 5V
Conditions
IO
DD
= +2mA
, f
CPU
, and T
Section 12.2.2
0.7xV
A
Min
2.5
20
20
unless otherwise specified.
DD
Typ
200
and the sum of I
2.5
0.2
30
30
2
ST72324B-Auto
0.3xV
42
Max
120
0.5
(4)
DD
IO
(I/O
Unit
mA
k
µs
µs
ns
V
V