MCP3304-CI/SL Microchip Technology, MCP3304-CI/SL Datasheet - Page 26

IC ADC 13BIT 2.7V 4CH SPI 16SOIC

MCP3304-CI/SL

Manufacturer Part Number
MCP3304-CI/SL
Description
IC ADC 13BIT 2.7V 4CH SPI 16SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of MCP3304-CI/SL

Package / Case
16-SOIC (0.154", 3.90mm Width)
Number Of Bits
13
Sampling Rate (per Second)
100k
Data Interface
Serial, SPI™
Number Of Converters
1
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Architecture
SAR
Conversion Rate
100 KSPs
Resolution
12 bit
Input Type
Voltage
Snr
80.02 dB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
MCP3304CI/SL

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP3304-CI/SL
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
MCP3304-CI/SL
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
MCP3302/04
6.2
Communication with the MCP3302/04 devices is done
using a standard SPI-compatible serial interface.
Initiating communication with either device is done by
bringing the CS line low (see
was powered up with the CS pin low, it must be brought
high and back low to initiate communication. The first
clock received with CS low and D
a start bit. The SGL/DIFF bit follows the start bit and will
determine if the conversion will be done using single
ended or differential input mode. Each channel in
single ended mode will operate as a 12-bit converter
with a unipolar output. No negative codes will be output
in single ended mode. The next three bits (D0, D1, and
D2) are used to select the input channel configuration.
Table 6-1
the MCP3302 and MCP3304, respectively. The device
will begin to sample the analog input on the fourth rising
edge of the clock after the start bit has been received.
The sample period will end on the falling edge of the
fifth clock following the start bit.
After the D0 bit is input, one more clock is required to
complete the sample and hold period (D
care” for this clock). On the falling edge of the next
clock, the device will output a low null bit. The next 13
clocks will output the result of the conversion with the
sign bit first, followed by the 12 remaining data bits, as
shown in
in the single ended mode, the sign bit will always be
transmitted as a ‘0’. Data is always output from the
device on the falling edge of the clock. If all 13 data bits
have been transmitted, and the device continues to
receive clocks while the CS is held low, the device will
output the conversion result, LSB, first, as shown in
Figure
while CS is still low (after the LSB first data has been
transmitted), the device will clock out zeros indefinitely.
If necessary, it is possible to bring CS low and clock in
leading zeros on the D
often done when dealing with microcontroller-based
SPI ports that must send 8 bits at a time. Refer to
Section 6.3
Microcontroller (MCU) SPI Ports” for more details on
using the MCP3302/04 devices with hardware SPI
ports.
DS21697E-page 26
6-3. If more clocks are provided to the device
Communicating with the MCP3302
and MCP3304
Figure
and
Table 6-2
“Using
6-2. Note that if the device is operating
IN
show the configuration bits for
line before the start bit. This is
the
Figure
MCP3302/04
IN
high will constitute
6-2). If the device
IN
is a “don’t
with
TABLE 6-1:
TABLE 6-2:
Single
*D2 is don’t care for MCP3302
Single
/Diff
/Diff
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
Control Bit
Control Bit
Selections
Selections
D2* D1 D0
D2
X
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1 D0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
CONFIGURATION BITS FOR
THE MCP3302
CONFIGURATION BITS FOR
THE MCP3304
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
© 2008 Microchip Technology Inc.
Configuration
Configuration
single ended
single ended
single ended
single ended
single ended
single ended
single ended
single ended
single ended
single ended
single ended
single ended
differential
differential
differential
differential
differential
differential
differential
differential
differential
differential
differential
differential
Input
Input
CH0 = IN+
CH1 = IN+
CH2 = IN+
CH3 = IN+
CH4 = IN+
CH5 = IN+
CH6 = IN+
CH7 = IN+
CH0 = IN+
CH1 = IN+
CH2 = IN+
CH3 = IN+
Selection
CH1 = IN-
CH0 = IN-
CH3 = IN-
CH2 = IN-
CH5 = IN-
CH4 = IN-
CH7 = IN-
CH6 = IN-
Selection
CH1 = IN-
CH0 = IN-
CH3 = IN-
CH2 = IN-
Channel
Channel
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
CH0
CH1
CH2
CH3

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