AD73322AST-REEL Analog Devices Inc, AD73322AST-REEL Datasheet - Page 5

• Manufacturer Part Number: AD73322AST-REEL
• Description: IC ANALOG FRONT END DUAL 44-LQFP
• Manufacturer: Analog Devices Inc

Specifications of AD73322AST-REEL

• Rohs Status: RoHS non-compliant
• Number Of Bits: 16
• Number Of Channels: 4
• Power (watts): 73mW
• Voltage - Supply, Analog: 2.7 V ~ 5.5 V
• Voltage - Supply, Digital: 2.7 V ~ 5.5 V
• Package / Case: 44-LQFP

SPECIFICATIONS
Parameter
REFERENCE
INPUT AMPLIFIER
ANALOG GAIN TAP
ADC SPECIFICATIONS
REV. B
REFCAP
REFOUT
Offset
Maximum Output Swing
Feedback Resistance
Feedback Capacitance
Gain at Maximum Setting
Gain at Minimum Setting
Gain Resolution
Gain Accuracy
Settling Time
Delay
Maximum Input Range at VIN
Nominal Reference Level at VIN
Absolute Gain
Gain Tracking Error
Signal to (Noise + Distortion)
Total Harmonic Distortion
Intermodulation Distortion
Idle Channel Noise
Crosstalk
DC Offset
Power Supply Rejection
Group Delay
Input Resistance at PGA
Absolute Voltage, VREFCAP
REFCAP TC
Typical Output Impedance
Absolute Voltage, VREFOUT
Minimum Load Resistance
Maximum Load Capacitance
(0 dBm0)
PGA = 0 dB
PGA = 38 dB
PGA = 0 dB
PGA = 38 dB
PGA = 0 dB
PGA = 38 dB
4, 5
ADC-to-DAC
ADC-to-ADC
2, 4, 6
1
2, 3
(AVDD = +5 V
T
A
= T
MIN
to T
MAX
Min
2
, unless otherwise noted)
10%; DVDD = +5 V
AD73322A
–100
Typ
1.2
2.4
50
130
1.2
2.4
3.156
50
100
+1
–1
5
1.0
0.5
3.156
3.17
2.1908
0
0.4
–0.7
78
78
57
56
–84
–70
–65
–71
–100
–70
+10
–65
25
20
1.0
1
0.1
–5–
Max
100
10%; DGND = AGND = 0 V, f
dB
Units
V
V
ppm/ C
V
V
k
pF
mV
V
k
pF
Bits
%
V p-p
dBm
V p-p
dBm
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBm0
dB
dB
mV
dB
k
s
s
s
Test Conditions/Comments
5VEN = 0
5VEN = 1
0.1 F Capacitor Required from
REFCAP to AGND2
5VEN = 0, Unloaded
5VEN = 1, Unloaded
5VEN = 1
Max Output Swing = (3.156/2.4) VREFCAP
f
Gain Step Size = 0.0625
Output Unloaded
Tap Gain Change of –FS to +FS
5VEN = 1
Measured Differentially
Max Input Swing = (3.156/2.4) VREFCAP
Measured Differentially
1.0 kHz, 0 dBm0
1.0 kHz, 0 dBm0
1.0 kHz, +3 dBm0 to –50 dBm0
Refer to Figure 7
300 Hz to 3400 Hz; f
300 Hz to 3400 Hz; f
0 Hz to f
300 Hz to 3400 Hz; f
300 Hz to 3400 Hz; f
300 Hz to 3400 Hz; f
PGA = 0 dB
PGA = 0 dB
ADC Input Signal Level: 1.0 kHz, 0 dBm0
DAC Input at Idle
ADC1 Input Signal Level: 1.0 kHz, 0 dBm0
ADC2 Input at Idle. Input Amplifiers Bypassed
Input Amplifiers Included in Channel
PGA = 0 dB
Input Signal Level at AVDD and DVDD
Pins: 1.0 kHz, 100 mV p-p Sine Wave
64 kHz Output Sample Rate
Input Amplifiers Bypassed
C
= 32 kHz
SAMP
DMCLK
/2; f
= 16.384 MHz, f
SAMP
SAMP
SAMP
SAMP
SAMP
SAMP
= 64 kHz
= 64 kHz
= 8 kHz
= 64 kHz
= 64 kHz
= 64 kHz
SAMP
AD73322
= 64 kHz;