DP8570AN National Semiconductor, DP8570AN Datasheet - Page 5

• Manufacturer Part Number: DP8570AN
• Description: IC TIMER CLOCK PERIPHERAL 28 DIP
• Manufacturer: National Semiconductor
• Type: Timer Clock Peripheral (TCP)r

Specifications of DP8570AN

• Memory Size: 44B
• Time Format: HH:MM:SS:hh (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 28-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP8570AN

General Description
The DP8570A’s interrupt structure provides four basic types
of interrupts Periodic Alarm Compare Timer and Power
Fail Interrupt mask and status registers enable the masking
and easy determination of each interrupt
One dedicated general purpose interrupt output is provided
A second interrupt output is available on the Multiple Func-
tion Output (MFO) pin Each of these may be selected to
generate an interrupt from any source Additionally the
MFO pin may be programmed to be either as oscillator out-
put or Timer 0’s output
Pin Description
CS RD WR (Inputs) These pins interface to
lines The CS pin is an active low enable for the read and
write operations Read and Write pins are also active low
and enable reading or writing to the TCP All three pins are
disabled when power failure is detected However if a read
or write is in progress at this time it will be allowed to com-
plete its cycle
A0 –A4 (Inputs) These 5 pins are for register selection
They individually control which location is to be accessed
These inputs are disabled when power failure is detected
OSC IN (Input) OSC OUT (Output) These two pins are
used to connect the crystal to the internal parallel resonant
oscillator The oscillator is always running when power is
applied to V
the Real Time Mode Register have been set
MFO (Output) The multi-function output can be used as a
second interrupt output for interrupting the P This pin can
also provide an output for the oscillator or the internal Timer
0 The MFO output can be programmed active high or low
open drain or push-pull If in battery backed mode and a
pull-up resistor is attached it should be connected to a volt-
age no greater than V
during battery operation (V
INTR (Output) The interrupt output is used to interrupt the
processor when a timing event or power fail has occurred
and the respective interrupt has been enabled The INTR
output can be programmed active high or low push-pull or
open drain If in battery backed mode and a pull-up resistor
is attached it should be connected to a voltage no greater
than V
operation (V
clear the INTR write a 1 to the appropriate bit(s) in the Main
Status Register
D0 –D7 (Input Output) These 8 bidirectional pins connect
to the host
write to the TCP When the PFAIL pin goes low and a write
is not in progress these pins are at TRI-STATE
PFAIL (Input) In battery backed mode this pin can have a
digital signal applied to it via some external power detection
logic When PFAIL
mode in a minimum of 30 s or a maximum of 63 s unless
lockout delay is programmed In the single power supply
mode this pin is not useable as an input and should be tied
to V
tion
V
up power supply This power supply is switched to the inter-
nal circuitry when the V
ing this pin eliminates the need for external logic to switch in
and out the back-up power supply If this feature is not to be
BB
CC
(Battery Power Pin) This pin is connected to a back-
BB
Refer to section on Power Fail Functional Descrip-
This pin is configured open drain during battery
BB
BB l
P’s data bus and are used to read from and
and V
V
CC
e
CC
) The output is a DC voltage level To
BB
logic 0 the TCP goes into a lockout
CC
and the correct crystal select bits in
This pin is configured open drain
BB l
becomes lower than V
V
(Continued)
CC
)
BB
P control
Utiliz-
5
used then this pin must be tied to ground the TCP pro-
grammed for single power supply only and power applied to
the V
TCK G1 G0 (Inputs) T1 (Output) TCK is the clock input
to both timers when they have an external clock selected In
modes 0 1 and 2 G0 and G1 are active low enable inputs
for timers 0 and 1 respectively In mode 3 G0 and G1 are
positive edge triggers to the timers T1 is dedicated to the
timer 1 output The T1 output can be programmed active
high or low push-pull or open drain Timer 0 output is avail-
able through MFO pin if desired If in battery backed mode
and a pull-up resistor is attached to T1 it should be con-
nected to a voltage no greater than V
figured open drain during battery operation (V
V
GND This is the common ground power pin for both V
and V
Connection Diagrams
CC
CC
This is the main system power pin
CC
pin
See NS Package Number V28A
See NS Package Number N28B
Order Number DP8570AV
Order Number DP8570AN
Plastic Chip Carrier
Top View
Dual-In-Line
Top View
BB
The T1 pin is con-
BB l
TL F 8638 – 5
TL F 8638 – 6
V
CC
)
BB