ISL1219IUZ Intersil, ISL1219IUZ Datasheet - Page 22

• Manufacturer Part Number: ISL1219IUZ
• Description: IC RTC LP BATT BACK SRAM 10MSOP
• Manufacturer: Intersil
• Type: Clock/Calendar/NVSRAMr

Specifications of ISL1219IUZ

• Memory Size: 2B
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Clock Format: HH
• Clock Ic Type: RTC
• Interface Type: I2C, Serial
• Memory Configuration: 2 X 8
• Supply Voltage Range: 2.7V To 5.5V
• Digital Ic Case Style: MSOP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

If full industrial temperature compensation is desired in an
ISL1219 circuit, then both the DTR and ATR registers will
need to be utilized (total correction range = -94 to +140ppm).
A system to implement temperature compensation would
consist of the ISL1219, a temperature sensor, and a
microcontroller. These devices may already be in the system
so the function will just be a matter of implementing software
and performing some calculations. Fairly accurate
temperature compensation can be implemented just by using
the crystal manufacturer’s specifications for the turnover
temperature T
calculating the oscillator adjustment necessary is:
Adjustment (ppm) = (T – T
Once the temperature curve for a crystal is established, then
the designer should decide at what discrete temperatures
the compensation will change. Since drift is higher at
extreme temperatures, the compensation may not be
needed until the temperature is greater than +20°C from T
A sample curve of the ATR setting vs. Frequency Adjustment
for the ISL1219 and a typical RTC crystal is given in
Figure 21. This curve may vary with different crystals, so it is
good practice to evaluate a given crystal in an ISL1219
circuit before establishing the adjustment values.
FIGURE 21. ATR SETTING vs OSCILLATOR FREQUENCY
FIGURE 20. RTC CRYSTAL TEMPERATURE DRIFT
-100.0
-120.0
-140.0
-160.0
-10.0
-20.0
-30.0
-40.0
90.0
80.0
70.0
60.0
50.0
40.0
30.0
20.0
10.0
-20.0
-40.0
-60.0
-80.0
0.0
0.0
0
-40 -30 -20 -10 0
ADJUSTMENT
0
5
and the drift coefficient (β). The formula for
10 15 20 25 30 35 40 45 50 55 60
TEMPERATURE (°C)
0
ATR SETTING
)
10 20 30 40 50 60 70 80
2
22
* β
0
ISL1219
.
This curve is then used to figure what ATR and DTR settings
are used for compensation. The results would be placed in a
lookup table for the microcontroller to access.
Layout Considerations
The crystal input at X1 has a very high impedance, and
oscillator circuits operating at low frequencies such as
32.768kHz are known to pick up noise very easily if layout
precautions are not followed. Most instances of erratic clocking
or large accuracy errors can be traced to the susceptibility of
the oscillator circuit to interference from adjacent high speed
clock or data lines. Careful layout of the RTC circuit will avoid
noise pickup and insure accurate clocking.
Figure 22 shows a suggested layout for the ISL1219 device
using a surface mount crystal. Two main precautions should
be followed:
In addition, it is a good idea to avoid a ground plane under
the X1 and X2 pins and the crystal, as this will affect the load
capacitance and therefore the oscillator accuracy of the
circuit. If the ~IRQ/F
routed away from the RTC device as well. The traces for the
V
be routed around the crystal.
Super Capacitor Backup
The ISL1219 device provides a V
battery backup input. A Super Capacitor can be used as an
alternative to a battery in cases where shorter backup times
are required. Since the battery backup supply current
required by the ISL1219 is extremely low, it is possible to get
months of backup operation using a Super Capacitor.
Typical capacitor values are a few µF to 1 Farad or more
depending on the application.
If backup is only needed for a few minutes, then a small
inexpensive electrolytic capacitor can be used. For extended
periods, a low leakage, high capacity Super Capacitor is the
1. Do not run the serial bus lines or any high speed logic
2. Add a ground trace around the crystal with one end
BAT
FIGURE 22. SUGGESTED LAYOUT FOR ISL1219 AND
lines in the vicinity of the crystal. These logic level lines
can induce noise in the oscillator circuit to cause
misclocking.
terminated at the chip ground. This will provide termination
for emitted noise in the vicinity of the RTC device.
and VDD pins can be treated as a ground, and should
CRYSTAL
OUT
pin is used as a clock, it should be
BAT
pin which is used for a
ISL1219
July 15, 2010
FN6314.2