LMX2433TMX/NOPB National Semiconductor, LMX2433TMX/NOPB Datasheet - Page 31

• Manufacturer Part Number: LMX2433TMX/NOPB
• Description: IC SYNTHESIZER DL 3.6GHZ 20TSSOP
• Manufacturer: National Semiconductor
• Series: PLLatinum™r
• Type: PLL Frequency Synthesizerr

Specifications of LMX2433TMX/NOPB

• Pll: Yes with Bypass
• Input: CMOS
• Output: CMOS
• Number Of Circuits: 1
• Ratio - Input:output: 3:2
• Differential - Input:output: Yes/No
• Frequency - Max: 3.6GHz, 1.7GHz
• Divider/multiplier: No/No
• Voltage - Supply: 2.25 V ~ 2.75 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Frequency-max: 3.6GHz
• For Use With: LMX2433EVAL - EVALUATION BOARD FOR LMX2433
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LMX2433TMX

LMX243x OSCin Sensitivity Test Setup
The block diagram above illustrates the setup required to
measure the LMX243x device’s OSCin buffer sensitivity
level. The same setup is used for the LMX2430TM Evalua-
tion Board. This setup is similar to the FinRF sensitivity setup
except that the signal generator is now connected to the
OSCin pin and both Fin pins are tied to Vcc. The 51Ω shunt
resistor matches the OSCin input to the signal generator.
The R counter is typically set to 1000, i.e. RF_R word = 1000
or IF_R word = 1000. The reference divider output is routed
to the Ftest/LD pin by selecting the RF_R/ 2 Frequency word
(MUX[3:0] word = 14) or the IF_R/ 2 Frequency word
(MUX[3:0] word = 12) in CodeLoader. A Universal Counter is
connected to the Ftest/LD pin and is used to monitor the
31
output frequency of the reference divider. The expected
frequency should be the signal generator frequency divided
by twice the corresponding counter value, i.e. 2000. The
factor of two comes in because the LMX243x device has an
internal /2 circuit which is used to provide a 50% duty cycle.
In a similar way, sensitivity is typically measured over fre-
quency, supply voltage and temperature. In order to perform
the measurement, the temperature, frequency, and supply
voltage is set to a fixed value and the power level (voltage
level) of the signal at OSCin is varied. Sensitivity is reached
when the frequency error of the divided input signal is
greater than or equal to 1 Hz.
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