IPPOSPHYP3 Altera, IPPOSPHYP3 Datasheet - Page 9

• Manufacturer Part Number: IPPOSPHYP3
• Manufacturer: Altera

Specifications of IPPOSPHYP3

• Lead Free Status / RoHS Status: Not Compliant

Chapter 1: About This Compiler
Performance and Resource Utilization
Performance and Resource Utilization
© November 2009 Altera Corporation
f
You only need to purchase a license for the megafunction when you are completely
satisfied with its functionality and performance, and want to take your design to
production.
For more information on OpenCore Plus hardware evaluation using the POS-PHY
Level 2 and 3 Compiler, see
320: OpenCore Plus Evaluation of
Table 1–3
PHY MegaCore functions. All results are push-button performance and use a FIFO
buffer size of 512 bytes. These results were obtained using the Quartus
version for the following devices:
■
■
■
■
Table 1–3. Performance—POS-PHY Level 2 Link Layer—Cyclone II Device
Table 1–4. Performance—POS-PHY Level 2 Link Layer—Stratix III Device
Table 1–5. Performance—POS-PHY Level 2 PHY Layer—Cyclone II Device (Part 1 of 2)
Device: EP2C5F256C6
SPHY receive
SPHY transmit
Device: EP2C15AF484C6
MPHY 4-port receive
MPHY 4-port transmit
SPHY receive
SPHY transmit
MPHY 4-port receive
MPHY 4-port transmit
Device: EP2C5F256C6
SPHY receive
Cyclone II (see tables for device details)
Cyclone III (EP3C5F256C6 for POS-PHY level 3)
Stratix III (EP3SL70F484C2 for POS-PHY level 2; EP3SL50F484C2 for POS-PHY
level 3)
Stratix IV (EP4SGX70DF29C2X )
MegaCore Function
MegaCore Function
MegaCore Function
through
1–7
show typical expected performance for SPHY and 4-port POS-
“OpenCore Plus Time-Out Behavior” on page 3–6
Preliminary
ALUTs
1,267
1,272
177
210
558
624
416
407
LEs
354
LEs
Megafunctions.
Registers
Logic
1,051
1,024
348
326
Memory Blocks
Memory Blocks
M4K
M4K
POS-PHY Level 2 and 3 Compiler User Guide
2
2
8
8
2
Memory Blocks
M9K
2
2
8
8
®
II software
f
f
MAX
MAX
f
MAX
176
149
167
128
174
(MHz)
(MHz)
and
344
310
320
221
(MHz)
AN
1–5