PNX1311EH/G NXP Semiconductors, PNX1311EH/G Datasheet - Page 434
PNX1311EH/G
Manufacturer Part Number
PNX1311EH/G
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1311EHG.pdf
(548 pages)
Specifications of PNX1311EH/G
Lead Free Status / RoHS Status
Compliant
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Philips Semiconductors
Logical shift right immediate
SYNTAX
FUNCTION
DESCRIPTION
result in rdest that is equal to rsrc1 logically shifted right by n bits. The value of n must be between 0 and 31, inclusive.
Zeros fill vacated bits from the left.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is unchanged.
EXAMPLES
r30 = 0x7008000f
r30 = 0x7008000f
r10 = 0, r30 = 0x7008000f
r20 = 1, r30 = 0x7008000f
r40 = 0x80030007
r30 = 0x7008000f
r40 = 0x80030007
As shown below, the
The
[ IF rguard ] lsri(n) rsrc1 → rdest
if rguard then {
}
lsri
rdest<31:32–n> ← 0
rdest<31–n:0> ← rsrc1<31:n>
Initial Values
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
Intermediate result
lsri
(example: n = 3)
operation takes a single argument in rsrc1 and an immediate modifier n and produces a
rsrc1
rdest
lsri(1) r30 → r50
lsri(2) r30 → r60
IF r10 lsri(4) r30 → r70
IF r20 lsri(4) r30 → r80
lsri(4) r40 → r90
lsri(31) r30 → r100
lsri(31) r40 → r110
31
31
S
0
0
0
0
0
0
28
S
S
Operation
Right shifter
32 bits from rsrc1
PRELIMINARY SPECIFICATION
PNX1300/01/02/11 DSPCPU Operations
r50 ← 0x38040007
r60 ← 0x1c020003
no change, since guard is false
r80 ← 0x07008000
r90 ← 0x08003000
r100 ← 0x00000000
r110 ← 0x00000001
0
0
asl asli asr asri lsl lsli
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
Shift amount n
from operation modifier
lsr rol roli
ATTRIBUTES
SEE ALSO
Result
shifter
7 bits
0..31
1, 2
9
1
1
lsri
A-136
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