SAA7113H/V2,518 Trident Microsystems, Inc., SAA7113H/V2,518 Datasheet - Page 39

• Manufacturer Part Number: SAA7113H/V2,518
• Manufacturer: Trident Microsystems, Inc.

Specifications of SAA7113H/V2,518

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Philips Semiconductors
9397 750 14232
Product data sheet
9.2.4 Subaddress 03h
9.2.5 Subaddress 04h
Table 30:
Table 31:
Table 32:
Analog function select FUSE
Amplifier plus anti-alias filter bypassed
Amplifier active
Amplifier plus anti-alias filter active
Function
Static gain control channel 1 (GAI18) (see subaddress 04h)
Sign bit of gain control
Static gain control channel 2 (GAI28) (see subaddress 05h)
Sign bit of gain control
Gain control fix (GAFIX)
Automatic gain controlled by MODE3 to MODE0
Gain is user programmable via GAI1 + GAI2
Automatic gain control integration (HOLDG)
AGC active
AGC integration hold (freeze)
White peak off (WPOFF)
White peak control active
White peak off
AGC hold during vertical blanking period (VBSL)
Short vertical blanking (AGC disabled during equalization and
serration pulses)
Long vertical blanking (AGC disabled from start of
pre-equalization pulses until start of active video (line 22 for
60 Hz, line 24 for 50 Hz)
HL not reference select (HLNRS)
Normal clamping if decoder is in unlocked state
Reference select if decoder is in unlocked state
Decimal
value
0...
...117...
...511
Gain
(dB)
Analog control 1 subaddress 02h (D7 and D6) (see
Analog control 2 (AICO2) subaddress 03h
Gain control analog (AICO3); static gain control channel 1 GAI1 subaddress 04h
(D7 to D0)
0
6
3
Sign
bit
GAI18 GAI17 GAI16 GAI15 GAI14 GAI13 GAI12 GAI11 GAI10
0
0
1
Rev. 02 — 9 May 2005
Control bits D7 to D0
0
0
1
0
1
1
0
1
1
0
1
1
0
0
1
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Figure
9-bit video input processor
Control bits D7 and D6
FUSE1
0
0
1
1
Logic level
see
see
0
1
0
1
0
1
0
1
0
1
Table 32
Table 33
0
1
1
SAA7113H
6)
0
0
1
FUSE0
0
1
0
1
Data bit
D0
D1
D2
D2
D3
D3
D4
D4
D5
D5
D6
D6
0
1
1
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