PNX1301EH/G,557 Trident Microsystems, Inc., PNX1301EH/G,557 Datasheet - Page 464

• Manufacturer Part Number: PNX1301EH/G,557
• Manufacturer: Trident Microsystems, Inc.

Specifications of PNX1301EH/G,557

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Philips Semiconductors
8-bit store
pseudo-op for h_st8d(0)
SYNTAX
FUNCTION
DESCRIPTION
arguments. (Note: pseudo operations cannot be used in assembly files.)
in rsrc1. This operation does not depend on the bytesex bit in the PCSW since only a single byte is stored.
only for 32-bit loads and stores.
modification of the addressed memory location (and the modification of cache if the location is cacheable). If the LSB
of rguard is 1, the store takes effect. If the LSB of rguard is 0, st8 has no side effects whatever; in particular, the LRU
and other status bits in the data cache are not affected.
EXAMPLES
r10 = 0xd00, r80 = 0x44332211
r50 = 0, r20 = 0xd01,
r70 = 0xaabbccdd
r60 = 1, r30 = 0xd02,
r70 = 0xaabbccdd
The
The
The result of an access by
The
[ IF rguard ] st8 rsrc1 rsrc2
if rguard then
st8
st8
mem[rsrc1] ← rsrc2<7:0>
st8
operation stores the least-significant 8-bit byte of rsrc2 into the memory location pointed to by the address
Initial Values
operation is a pseudo operation transformed by the scheduler into an
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
st8
to the MMIO address aperture is undefined; access to the MMIO aperture is defined
st8 r10 r80
IF r50 st8 r20 r70
IF r60 st8 r30 r70
Operation
PRELIMINARY SPECIFICATION
PNX1300/01/02/11 DSPCPU Operations
[0xd00] ← 0x11
no change, since guard is false
[0xd02] ← 0xdd
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
h_st8d st8d st16 st16d
h_st8d(0)
ATTRIBUTES
st32 st32d
SEE ALSO
Result
with the same
dmem
4, 5
n/a
No
29
—
2
st8
A-166