PNX1301EH/G,557 Trident Microsystems, Inc., PNX1301EH/G,557 Datasheet - Page 371

• Manufacturer Part Number: PNX1301EH/G,557
• Manufacturer: Trident Microsystems, Inc.

Specifications of PNX1301EH/G,557

• Lead Free Status / RoHS Status: Supplier Unconfirmed

PNX1300/01/02/11 Data Book
hicycles
SYNTAX
FUNCTION
DESCRIPTION
hicycles
destination register, rdest. The contents of the master counter are transferred to the slave CCCOUNT register only on
a successful interruptible jump and on processor reset. Thus, if
intervening interruptible jumps, the operation pair is guaranteed to be a coherent sample of the master clock-cycle
counter. The master counter increments on all cycles (processor-stall and non-stall) if PCSW.CS = 1; otherwise, the
counter increments only on non-stall cycles.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
A-73
CCCOUNT_HR = 0xabcdefff12345678
r10 = 0, CCCOUNT_HR = 0xabcdefff12345678
r20 = 1, CCCOUNT_HR = 0xabcdefff12345678
Refer to
The hi
[ IF rguard ] hicycles → rdest
if rguard then
rdest ← CCCOUNT<63:32>
cycles
Section 3.1.5, “CCCOUNT—Clock Cycle Counter”
operation copies the high 32 bits of the slave register Clock Cycle Counter (CCCOUNT) to the
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
Initial Values
PRELIMINARY SPECIFICATION
Read clock cycle counter, most-significant word
hicycles → r60
IF r10 hicycles → r70
IF r20 hicycles → r100
Operation
for a description of the CCCOUNT operation. The
cycles
and
cycles curcycles writepcsw
hicycles
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
r60 ← 0xabcdefff
no change, since guard is false
r100 ← 0xabcdefff
Philips Semiconductors
ATTRIBUTES
SEE ALSO
are executed without
Result
fcomp
155
No
—
0
1
3